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AssigneeEaton Corporation
InventorBarry J. Rueckert
Estimating the term…
An adjustable-frequency three phase motor control system (2, CSI, M) is provided with a spike voltage clamp (SVC) to control the magnitude of voltage spikes generated during commutation of the current source inverter (CSI) thereby to protect the low voltage power devices (12a-c, 14a-c, SCRl-6) from damage. This spike voltage clamp comprises a rectifier bridge (32) connected to the output terminals (01, 02, 03) of the inverter (3) a storage capacitor (C) connected across the rectifier bridge output terminals, and a spike voltage dissipating resistor (Ra, Rb) and a gate turn-off thyristor (GTO) connected in series across the capacitor. A clamp control circuit (CC) precharges the storage capacitor and senses an increasing voltage thereon in response to voltage spikes across the motor terminals and gates the thyristor (GTO) to allow the resistor to dissipate a portion of the energy of the voltage spikes thereby limiting the magnitude of the voltage spikes. This clamp control circuit (CC) additionally includes an over-current sense circuit (OCS) that provides a fault trip signal if the resistor clamp is not turned off at the end of a required interval, and an over-voltage sense circuit (OVS) that responds to a higher spike voltage to provide a trip signal. This over-voltage trip signal and the over-current trip signal are fed to a common fault trip circuit (FT) which provides a gating signal to a fault thyristor (FSCR) thereby to provide an output signal which may be used to safely stop the motor control system. Whenever the spike voltage decreases below the voltage on the storage capacitor (C), the capacitor voltage blocks the three phase full-wave rectifier bridge (32) to decouple the resistor clamp circuit from the motor. When the voltage on the storage capacitor decreases to a required value, the clamp control circuit senses the decreasing voltage and gates thyristor GTO off to cause the resistor to be disconnected from the circuit.
In an adjustable frequency A.C. motor control system having a solid state inverter supplied by adjustable D.C. voltage for applying adjustable frequency current to the A.C. motor input terminals and said inverter having low voltage power devices for switching the current into the motor phases and means for commutating the power devices in the proper order, and said switching causing large voltage transients or voltage spikes to be produced which would be impressed on the motor and which might damage the inverter power devices, the improvement comprising:
Dependencies are inferred from the claim text.