Complementary Schottky transistor logic circuit
AssigneeHitachi, Ltd.
InventorsKenji Kaneko, Takahiro Okabe, Minoru Nagata, Yutaka Okada
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AssigneeHitachi, Ltd.
InventorsKenji Kaneko, Takahiro Okabe, Minoru Nagata, Yutaka Okada
Estimating the term…
A logic circuit is provided which includes a plurality of basic circuits each of which has a pnp (or npn) transistor as a constant current load and at least one npn (or pnp) transistor each as a driver with a clamping Schottky diode. The base of the driver transistor is used as an input terminal and the collector thereof is used as an output terminal, for each basic circuit and the output terminal of the preceding stage basic circuit is coupled directly to the input terminal of the subsequent stage basic circuit. In order to prevent current hogging the load current supplied from the preceding stage constant current load transistor is set to operate the subsequent stage driver transistor in a saturation made when the subsequent stage driver transistor is in the ON state.
A logic circuit comprising a plurality of basic circuits each including at least one single-collector driver transistor provided with a clamping Schottky diode, the emitter of said driver transistor being grounded, the base of said driver transistor being used as an input terminal and the collector thereof being used as an output terminal for said basic circuit, each of said basic circuits further including a constant current load transistor coupled to said output terminal of each said basic circuit, wherein the output terminal of a preceding stage basic circuit is coupled directly to the input terminal of the subsequent stage basic circuit, said logic circuit further comprising means for adjusting the amplitude of said constant current provided by each of said constant current load transistors to operate the driver transistor of the subsequent stage, with said clamping Schottky diode forward biased, in a shallow saturation mode when said subsequent stage driver transistor is in an ON state.
A logic circuit comprising a plurality of basic circuits each including at least one single collector driver transistor provided with a clamping Schottky diode, the emitter of said driver transistor being grounded, the base of said driver transistor being used as an input terminal and the collector thereof being used as an output terminal for said basic circuit, each of said basic circuits further including a constant current load transistor coupled to said output terminal of each said basic circuit, wherein the output terminal of a preceding stage basic circuit is coupled directly to the input terminal of a plurality of subsequent stage basic circuits, said logic circuit further comprising means for adjusting the amplitude of said constant current provided by each of said constant current load transistors to operate each of the driver transistors of the subsequent stages, with their clamping Schottky diodes forward biased, in a shallow saturation mode when said subsequent stage driver transistors are in an ON state.
A logic circuit comprising a plurality of directly coupled logic stages each including at least one circuit unit, each said circuit unit having a load transistor serving as a constant current load and at least one single collector driver transistor provided with a clamping Schottky diode, the emitter of said driver transistor being grounded and the base and the collector of said driver transistor being used as an input terminal and an output terminal for their associated circuit unit, respectively, wherein at least one of said logic stages includes a plurality of said circuit units coupled to be driven by a preceding logic stage, the logic circuit further comprising means for adjusting the amplitudes of the constant currents provided by the constant current load transistors of said at least one logic stage and said preceding logic stage such that the driver transistor in each of the circuit units of said at least one logic stage is operated, with its clamping Schottky diode forward biased, in a shallow saturation mode when it is in an ON state.
Dependencies are inferred from the claim text.