Gallium arsenide to emitter coupled logic level converter

A gallium arsenide (GaAs) level converter for employing gallium arsenide logic source input signals to drive emitter coupled logic (ECL) circuitry, comprising:

• a non-inverting gallium arsenide logic source input,
• an inverting gallium arsenide logic source input,
• a plurality of series connected gallium arsenide level shifting diodes connected in each said gallium arsenide logic source input,
• a voltage source,
• a first gallium arsenide differential amplifier connected to said voltage source,
• said first gallium arsenide differential amplifier having a non-inverting input transistor whose gate is coupled to said non-inverting gallium arsenide logic source input and having an inverting input transistor whose gate is coupled to the inverting logic source input,
• a resistive pull-up load connected intermediate said voltage source and the drain of said inverting input transistor,
• a low reference voltage,
• a resistive common source impedance connected between the source of said input transistors and said low reference voltage,
• an output line connected to the drain of said inverting input transistor,
• a termination voltage,
• an output load branch having a series connected gallium arsenide transistor, a gallium arsenide level shifting diode and a precision termination resistor connected between said voltage source and said termination voltage,
• said output key being connected to the gate of said output load branch transistor, and
• a converter output line connected intermediate said gallium arsenide diode and said precision termination resistor, whereby said converter output line is provided with a full range of output voltage swings adapted to drive emitter coupled logic loads.