# US 4,398,962 A · Method of controlling base contact regions by forming a blocking layer contiguous to a doped poly-si emitter source

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 4,398,962 A
- Document ID: US4398962A
- Status: Granted
- Kind: A
- Application number: 06/306,223
- Filed: 1981-09-28
- Granted: 1983-08-16
- Earliest claimed: 1980-09-26
- Assignees: Tokyo Shibaura Denki Kabushiki Kaisha
- Inventors: Mamoru Kanazawa
- Web page: https://patentgrep.com/patent/US4398962A

## CPC

- H10D 10/051: {of vertical BJTs (of heterojunction BJTs H10D10/021; of Schottky BJTs H10D10/031; of thin film BJTs H10D10/041)}
- H10D 48/345: {Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions}
- H10P 32/1414: {the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon}
- H10P 32/171: {being group IV material}
- H10P 50/283: {by chemical means}
- H10P 76/40: of masks comprising inorganic materials
- Y10S 148/092: Laser beam processing-diodes or transistor
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A method of manufacturing a semiconductor device includes a step of forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer. An ion implantation blocking layer is formed to cover the top and side surfaces of the doped film and the exposed surface of the semiconductor layer. Then, the blocking layer is anisotropically etched by irradiating it with a dry etchant in a direction substantially normal to the semiconductor layer. The anisotropic etching is carried out until the top surface of the doped film is substantially exposed, thereby allowing a portion of the blocking layer to leave surrounding the doped film and also substantially forming a base contact hole defined by the exposed side surface of the remaining blocking layer. Subsequently, ion implantation is conducted against the semiconductor layer with the remaining blocking layer used as a mask, to form at least a base contact region of a high impurity concentration in a portion of the semiconductor layer corresponding to the base contact hole.

## Claims

### Claim 1

A method of manufacturing a semiconductor device comprising the steps in the following order of:
(a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer;
(b) forming an ion implantation blocking layer covering said doped film and the exposed surface of said semiconductor layer;
(c) anisotropically etching said blocking layer until the surface of said doped film is substantially exposed, by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer;
(d) conducting ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole; and
(e) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.

### Claim 2 (depends on 1)

The method according to claim 1, wherein said anisotropic etching is carried out until the surface of said doped film is completely exposed.

### Claim 3 (depends on 1)

The method according to claim 1, wherein said anisotropic etching is carried out such that said blocking layer is slightly left also on said doped film and said semiconductor layer.

### Claim 4 (depends on 1)

The method according to claim 1, wherein said blocking layer is formed of silicon oxide, silicon nitride or glass.

### Claim 5 (depends on 1)

The method according to claim 1, wherein said semiconductor layer is formed of silicon.

### Claim 6 (depends on 1)

The method according to claim 1, wherein said doped film comprises polycrystalline silicon.

### Claim 7 (depends on 1)

The method according to claim 1, wherein said blocking layer comprises a thermal oxide film and a chemical vapor deposition film formed thereon.

### Claim 8 (depends on 1)

The method according to claim 1, wherein said dry etchant is a reactive ion etchant or an inactive ion etchant.

### Claim 9 (depends on 1)

The method according to claim 1, further comprising forming a base active region in said semiconductor layer under said remaining blocking layer and slaid doped film by said ion implantation during step (d).

### Claim 10 (depends on 1)

The method according to claim 1, further comprising forming, before step (a), a base active region in said semiconductor layer by ion implantation.

### Claim 11 (depends on 3)

The method according to claim 3, wherein the slightly remaining blocking layer on said doped film and said semiconductor layer is removed by wet etching after said ion implantation step (d).

### Claim 12 (depends on 8)

The method according to claim 8, wherein said reactive ion etchant is derived from a mixture of carbon tetrafluoride and hydrogen through glow discharge.

### Claim 13 (depends on 8)

The method according to claim 8, wherein said reactive ion etchant is derived from a mixture of carbon monobromotrifluoride and chlorine through glow discharge.

### Claim 14

A method of manufacturing a semiconductor device comprising the steps of the following order of:
(a) forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer which surface area constitutes an island region isolated by an insulating layer;
(b) forming an ion implantation blocking layer covering said dope film and the exposed surface of said semiconductor layer;
(c) anisotropically etching said portion of said blocking layer by irradiating said blocking layer with a dry etchant in a direction substantially normal to said semiconductor layer, thereby allowing a portion of said blocking layer to remain surrounding said doped film and substantially forming a base contact hole defined between the exposed side surfaces of said remaining blocking layer and said insulating layer;
(d) conducing ion implantation with respect to said semiconductor layer, with said remaining blocking layer and said doped film used as a mask, to form at least a base contact region of a high impurity concentration in a portion of said semiconductor layer corresponding to said base contact hole;
(e) anisotropically etching the remainder of said blocking layer in the manner of step (c) until the surface of said doped film is substantially exposed; and
(f) forming an emitter region in said semiconductor layer by diffusing the impurity from said doped film into said semiconductor layer by a thermal treatment.