# US 4,398,343 A · Method of making semi-amorphous semiconductor device

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- Number: US 4,398,343 A
- Document ID: US4398343A
- Status: Granted
- Kind: A
- Application number: 06/265,841
- Filed: 1981-05-21
- Granted: 1983-08-16
- Earliest claimed: 1980-05-26
- Inventors: Shunpei Yamazaki
- Web page: https://patentgrep.com/patent/US4398343A

## CPC

- H10P 34/422: {using incoherent radiation}
- H10D 62/40: Crystalline structures
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/3402: {characterised by the chemical composition}
- H10P 14/3442: {N-type}
- H10P 14/3444: {P-type}
- H10P 95/80: Electrical treatments, e.g. for electroforming
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semi-amorphous semiconductor device manufacturing method in which a non-single crystal semiconductor layer is provided on a substrate to form therebetween a PN, PIN, PI or NI junction and a current is applied to the non-single crystal semiconductor layer to provide a semi-amorphous semiconductor layer. When the current is applied to the non-single crystal semiconductor layer, it is irradiated by light and/or heated at the same time.

## Claims

### Claim 1

A method for the manufacture of a semi-amorphous semiconductor device, comprising the step of:
preparing a substrate;
forming on the substrate a layer of non-single crystal semiconductor doped with a dangling bond neutralizer;
forming at least one conductive layer on the non-single crystal semiconductor; and
applying current to the non-single crystal semiconductor through the conductive layer and, at the same time, applying light to the non-single crystal semiconductor, thereby making semi-amorphous a region through which the current passes effectively.

### Claim 2 (depends on 1)

A manufacturing method according to claim 1, wherein the substrate is conductive and light-permeable; the current is applied to the non-single crystal semiconductor through the conductive light-permeable, substrate and the conductive layer formed on the non-single crystal semiconductor; and the light is applied to the non-single crystal semiconductor through the conductive, light-permeable substrate.

### Claim 3 (depends on 1)

A manufacturing method according to claim 1, wherein the substrate is conductive; the conductive layer is light-permeable; the current is applied to the non-single crystal semiconductor through the conductive substrate and the conductive layer formed on the non-single crystal semiconductor; and the light is applied to the non-single crystal semiconductor through the light-permeable conductive layer.

### Claim 4 (depends on 1)

A manufacturing method according to claim 1 wherein a conductive layer is formed on the substrate prior to the formation of the non-single crystal semiconductor on the substrate; the substrate and the conductive layer formed on the substrate are light-permeable; the current is applied to the non-single crystal semiconductor through the light-permeable conductive layer formed on the substrate and the conductive layer formed on the non-single crystal semiconductor layer; and the light is applied to the non-single crystal semiconductor through the light-permeable substrate and the light-permeable conductor layer.

### Claim 5 (depends on 1)

A manufacturing method according to claim 1 wherein a conductive layer is formed on the substrate prior to the formation of the non-single crystal semiconductor on the substrate; the conductive layer formed on the non-single crystal semiconductor is light-permeable; the current is applied to the non-single crystal semiconductor through the conductive layer formed on the substrate and the conductive layer formed on the non-single crystal semiconductor layer; and the light is applied to the non-single crystal semiconductor through the light-permeable, conductive layer.

### Claim 6 (depends on 1)

A manufacturing method according to claim 1 wherein when the conductive layer is formed on the non-single crystal semiconductor, at least two conductive layers are formed on the non-single crystal semiconductor; the substrate is light-permeable; the current is applied to the non-single crystal semiconductor through the two conductive layers; and the light is applied to the non-single crystal semiconductor through the light-permeable substrate.

### Claim 7 (depends on 1)

A manufacturing method according to claim 1 wherein when the conductive layer is formed on the non-single crystal semiconductor, at least two conductive layers are formed on the non-single crystal semiconductor; the two conductive layers are light-permeable; the current is applied to the non-single crystal semiconductor through the two light-permeable conductive layers; and the light is applied to the non-single crystal semiconductor through the two light-permeable conductive layers.

### Claim 8 (depends on 1)

A manufacturing method according to claim 1 wherein the conductive layer is retained as an electrode of the semi-amorphous semiconductor device after the application of current to the non-single crystal semiconductor through the conductive layer.

### Claim 9 (depends on 1)

A manufacturing method according to claim 1 wherein, after the application of current to the non-single crystal semiconductor through the conductive layer and the formation of the semi-amorphous semiconductor, the conductive layer is removed from the non-single crystal semiconductor; and at least one electrode is formed on the semi-amorphous semiconductor.

### Claim 10 (depends on 1)

A manufacturing method according to claim 1 wherein when the non-single crystal semiconductor is formed on the substrate, any one of PN, PIN, PI and NI junctions is formed in the non-single crystal semiconductor.

### Claim 11

A method for the manufacture of a semi-amorphous semiconductor device, comprising the steps of:
preparing a substrate;
forming on the substrate a layer of non-single crystal semiconductor doped with a dangling bond neutralizer;
forming at least one conductive layer on the non-single crystal semiconductor; and
applying current to the non-single crystal semiconductor through the conductive layer and, at the same time, applying heat to the non-single crystal semiconductor, thereby making semi-amorphous a region through which the current passes effectively.

### Claim 12 (depends on 11)

A manufacturing method according to claim 11, wherein the substrate is conductive; and the current is applied to the non-single crystal semiconductor through the conductive substrate and the conductive layer formed on the non-single crystal semiconductor.

### Claim 13 (depends on 11)

A manufacturing method according to claim 11 wherein a conductive layer is formed on the substrate prior to the formation of the non-single crystal semiconductor on the substrate; and the current is applied to the non-single crystal semiconductor through the conductive layer formed on the substrate and the conductive layer formed on the non-single crystal semiconductor layer.

### Claim 14 (depends on 11)

A manufacturing method according to claim 11 wherein when the conductive layer is formed on the non-single crystal semiconductor, at least two conductive layers are formed on the non-single crystal semiconductor; and the current is applied to the non-single crystal semiconductor through the two conductive layers.

### Claim 15 (depends on 11)

A manufacturing method according to claim 11 wherein the conductive layer is retained as an electrode of the semi-amorphous semiconductor device after the application of current to the non-single crystal semiconductor through the conductive layer.

### Claim 16 (depends on 11)

A manufacturing method according to claim 11 wherein, after the application of current to the non-single crystal semiconductor through the conductive layer and the formation of the semi-amorphous semiconductor, the conductive layer is removed from the non-single crystal semiconductor; and at least one electrode is formed on the semi-amorphous semiconductor.

### Claim 17 (depends on 11)

A manufacturing method according to claim 11 wherein when the non-single crystal semiconductor is formed on the substrate, any one of PN, PIN, PI and NI junctions is formed in the non-single crystal semiconductor.

### Claim 18

A method for the manufacture of a semi-amorphous semiconductor device, comprising the steps of:
preparing a substrate;
forming on the substrate a layer of non-single crystal semiconductor doped with a dangling bond neutralizer;
forming at least one conductive layer on the non-single crystal semiconductor; and
applying current to the non-single crystal semiconductor through the conductive layer and, at the same time, applying light and heat to the non-single crystal semiconductor, thereby making semi-amorphous a region through which the current passes effectively.

### Claim 19 (depends on 18)

A manufacturing method according to claim 18, wherein the substrate is conductive and light-permeable; the current is applied to the non-single crystal semiconductor through the conductive, light-permeable substrate and the conductive layer formed on the non-single crystal semiconductor; and the light is applied to the non-single crystal semiconductor through the conductive, light-permeable substrate.

### Claim 20 (depends on 18)

A manufacturing method according to claim 18, wherein the substrate is conductive; the conductive layer is light-permeable; the current is applied to the non-single crystal semiconductor through the conductive substrate and the conductive layer formed on the non-single crystal semiconductor; and the light is applied to the non-single crystal semiconductor through the light-permeable conductive layer.

### Claim 21 (depends on 18)

A manufacturing method according to claim 18 wherein a conductive layer is formed on the substrate prior to the formation of the non-single crystal semiconductor on the substrate; the substrate and the conductive layer formed on the substrate are light-permeable; the current is applied to the non-single crystal semiconductor through the light-permeable conductive layer formed on the substrate and the conductive layer formed on the non-single crystal semiconductor layer; and the light is applied to the non-single crystal semiconductor through the light-permeable substrate and the light-permeable conductive layer.

### Claim 22 (depends on 18)

A manufacturing method according to claim 18 wherein a conductive layer is formed on the substrate prior to the formation of the non-single semiconductor on the substrate; the conductive layer formed on the non-single crystal semiconductor is light-permeable; the current is applied to the non-single crystal semiconductor through the conductive layer formed on the substrate and the conductive layer formed on the non-single crystal semiconductor layer; and the light is applied to the non-single crystal semiconductor through the light-permeable conductive layer.

### Claim 23 (depends on 18)

A manufacturing method according to claim 18 wherein when the conductive layer is formed on the non-single crystal semiconductor, at least two conductive layers are formed on the non-single crystal semiconductor; the substrate is light-permeable; the current is applied to the non-single crystal semiconductor through the two conductive layers; and the light is applied to the non-single crystal semiconductor through the light-permeable substrate.

### Claim 24 (depends on 18)

A manufacturing method according to claim 18 wherein when the conductive layer is formed on the non-single crystal semiconductor, at least two conductive layers are formed on the non-single crystal semiconductor; the two conductive layers are light-permeable; the current is applied to the non-single crystal semiconductor through the two light-permeable, conductive layers; and the light is applied to the non-single crystal semiconductor through the two light-permeable conductive layers.

### Claim 25 (depends on 18)

A manufacturing method according to claim 18 wherein the conductive layer is retained as an electrode of the semi-amorphous semiconductor device after the application of current to the non-single crystal semiconductor through the conductive layer.

### Claim 26 (depends on 18)

A manufacturing method according to claim 18 wherein, after the application of current to the non-single crystal semiconductor through the conductive layer and the formation of the semi-amorphous semiconductor, the conductive layer is removed from the non-single crystal semiconductor; and at least one electrode is formed on the semi-amorphous semiconductor.

### Claim 27 (depends on 18)

A manufacturing method according to claim 18 wherein when the non-single crystal semiconductor is formed on the substrate, any one of PN, PIN, PI and NI junctions is formed in the non-single crystal semiconductor.

### Claim 28 (depends on 1)

A manufacturing method according to claim 1 wherein the non-single crystal semiconductor on the substrate is formed of silicon, germanium or an additional semiconductor material compound expressed by Si.sub.3 N.sub.4-x (0<x<4), SiO.sub.2-x (0<x<2), SiC.sub.x (0<x<1) or Si.sub.x Ge.sub.1-x (0<x<1).

### Claim 29 (depends on 1)

A manufacturing method according to claim 1 wherein the non-single crystal semiconductor on the substrate is formed of a III-V Group compound semiconductor selected from the group consisting of GaAs, BP, or InP.

### Claim 30 (depends on 11)

A manufacturing method according to claim 11 wherein the non-single crystal semiconductor on the substrate is formed of silicon, germanium or an additional semiconductor material compound expressed by Si.sub.3 N.sub.4-x (0<x<4), SiO.sub.2-x (0<x<2), SiC.sub.x (0<x<1) or Si.sub.x Ge.sub.1-x (0<x<1).

### Claim 31 (depends on 11)

A manufacturing method according to claim 11 wherein the non-single crystal semiconductor on the substrate is formed of a III-V Group compound semiconductor selected from the group consisting of GaAs, BP, or InP.

### Claim 32 (depends on 18)

A manufacturing method according to claim 18 wherein the non-single crystal semiconductor on the substrate is formed of silicon, germanium or an additional semiconductor material compound expressed by Si.sub.3 N.sub.4-x (0<x<4), SiO.sub.2-x (0<x<2), SiC.sub.x (0<x<1) or Si.sub.x Ge.sub.1-x (0<x<1).

### Claim 33 (depends on 18)

A manufacturing method according to claim 18 wherein the non-single crystal semiconductor on the substrate is formed of a III-V Group compound semiconductor selected from the group consisting of GaAs, PB, or InP.