Adaptive WSI/MNOS solid state memory system

A nonvolatile solid state mass memory system comprising:

• a plurality of adaptive, wafer scale integration memory wafers wherein an individual memory wafer comprises a plurality of rows with each row containing a first plurality of memory arrays each having a plurality of locations for nonvolatile storage of information and a second plurality of array controllers wherein the memory arrays in the row are operably connected to and uniquely accessed by the array controllers in the row by a first bi-directional bus means and the array controllers are operably connected to a second bi-directional bus means such that only one array controller is operable at one time within a row with the remainder of the functional array controllers serving as inactivated functional redundant spares;
• and
• a memory system control means comprising means to identify and access an individual memory wafer, means to identify and access individual array controllers via the second bi-directional bus, and interface means to operably connect the nonvolatile solid state mass memory system to an external information processing system.