# US 4,398,190 A · Character generator display system

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- Number: US 4,398,190 A
- Document ID: US4398190A
- Status: Granted
- Kind: A
- Application number: 06/235,821
- Filed: 1981-02-19
- Granted: 1983-08-09
- Earliest claimed: 1981-02-19
- Assignees: Honeywell Information Systems Inc.
- Inventors: Nicholas R. Long; William E. Peisel; Joseph L. Ryan; John P. Stafford; Richard R. Watkins
- Web page: https://patentgrep.com/patent/US4398190A

## CPC

- G09G 5/30: Control of display attribute
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A logic system is provided in a video system for accommodating the display of both video data characters and graphic characters, and the application of visual attributes to such characters whether occurring singularly or in fields.

## Claims

### Claim 1

A video control system for supplying both data characters and graphic characters in conjunction with visual attributes to video drive logic controlling the operation of a CRT video screen in a video terminal system having a timing control system, said video control system comprising:
random access memory means for storing character address codes at character-address-code addresses and for storing visual attribute codes, there being a visual-attribute-code address associated with each character-address-code address, each visual attribute code comprising attribute control bits and an attribute-change flag bit;
logic memory means responsive to binary address codes issued by said random access memory means for providing binary character codes including, alternatively, both binary data character codes and binary graphic character codes, the binary character codes comprising bits sufficient in number to match that required in a horizontal scan of a data character but not sufficient in number to match that required in a horizontal scan of at least certain graphic characters;
video information stream logic means receiving said binary character codes from said logic memory means and responsive to clock control signals generated by said timing control signals for converting said binary character codes to a serial video bit stream to be applied to said video drive logic, and repeating a most significant bit position logic level in said serial video bit stream upon occurrence of a graphic character flag bit in said binary address codes; and
visual attribute logic means for receiving visual attribute codes from said random access memory means and responsive to a character clock control signal issued by said timing control system and to said attribute change flag bit for changing and holding a binary visual attribute code and for supplying said binary visual attribute code to said video drive logic until changed in response to an attribute-change flag bit in a subsequent visual attribute code.

### Claim 2

A video control system for supplying both data characters and graphic characters in conjunction with visual attributes to video drive logic controlling the operation of a CRT video screen in a video terminal system having a timing control system, said video control system comprising:
random access memory means for storing character address codes at character-address-code addresses and for storing visual attribute codes, there being a visual-attribute-code address associated with each character-address-code address, each visual attribute code comprising attribute control bits and an attribute-change flag bit;
read only memory (ROM) character generator means responsive to character address codes received from said random access memory means for supplying binary character codes including, alternatively, both binary data character codes and binary graphic codes, the binary character codes comprising bits sufficient in number to match that required in a horizontal scan of a data character but not sufficient in number to match that required in a horizontal scan of at least certain graphic characters;
shift register means responsive to clock control signals generated by said timing control system and in electrical communication with said ROM character generator means for converting said binary character codes into a serial video stream for application to said video drive logic;
logic bit detection means sensitive to a graphic character flag bit in said binary address codes and responsive to both a character control signal received from said timing control system and to said clock control signals for repeating a logic level of a most significant bit position of said shift register means in said serial video bit stream to conform a graphic character code format with that of a data character code format; and
visual attribute logic means for receiving attribute codes from said random access memory means and responsive to said character control signal and to said attribute change flag bit for changing and holding a binary visual attribute code and for supplying said binary visual attribute code to said video drive logic until changed in response to an attribute-change flag bit in a subsequent visual attribute code.