# US 4,398,055 A · Radiant energy converter having sputtered CdSiAs.sub.2 absorber

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- Number: US 4,398,055 A
- Document ID: US4398055A
- Status: Granted
- Kind: A
- Application number: 06/295,072
- Filed: 1981-08-21
- Granted: 1983-08-09
- Earliest claimed: 1981-08-21
- Inventors: Lubna R. Ijaz; Larry C. Burton
- Web page: https://patentgrep.com/patent/US4398055A

## CPC

- H10F 10/16: Photovoltaic cells having only PN heterojunction potential barriers
- H10F 77/12: Active materials
- Y02E 10/50: Photovoltaic [PV] energy
- Y10S 438/93: Ternary or quaternary semiconductor comprised of elements from three different groups, e.g. I-III-V
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

Thin film radiant energy converter having a sputtered CdSiAs.sub.2 photovoltaic absorber layer and a thermally evaporated CdS top layer. The sputtering technique with multiple targets (Cd, Si, As) is used to obtain stoichiometric CdSiAs.sub.2 thin films which are polycrystalline and have large grain size to thereby reduce grain boundary recombinations of the photogenerated electrons.

## Claims

### Claim 1

In the manufacture of a radiant energy conversion cell the improvement comprising,
forming a polycrystalline layer with large grain size by stoichiometrically sputtering CdSiAs.sub.2 on a substrate using separate targets respectively comprising Cd, Si, and CdAs.sub.2, each said target having an ambient temperature of about 90.degree. C. to about 100.degree. C. with sputter bias voltages between about 0 to 1000 volts, said substrate having a closely controlled ambient temperature, the power for sputtering and temperature being limited to avoid evaporation of arsenic.

### Claim 2

In a radiant energy converter including a thin film absorber layer formed as a p-type semiconductor material and a thin film collector layer of an n-type semiconductor material in contact with and forming a heterojunction with said absorber layer, and electrode means on the non-contacting surfaces of said layers, the improvement wherein said absorber layer is a polycrystalline material formed by a controlled sputtering process to have large grain size to reduce grain boundary recombinations of photogenerated electrons and wherein said absorber is stoichiometric CdSiAs.sub.2.

### Claim 3 (depends on 2)

The invention defined in claim 2 wherein said collector layer is CdS.

### Claim 4 (depends on 2)

The invention defined in claim 2 wherein said CdS is formed in situ on said CdSiAs.sub.2 layer.

### Claim 5 (depends on 4)

The invention defined in claim 4 wherein said CdSiAs.sub.2 layer is from about 0.01 to about 0.001 micrometer thick.

### Claim 6

A thin film radiant energy conversion device comprising,
(a) a conductive substrate,
(b) a polycrystalline layer of CdSiAs.sub.2, having one surface conductively contacting the surface of said conductive substrate and constituting a p-type semiconductor layer,
(c) a CdS layer constituting an n-type semiconductor formed in situ on the other surface of said polycrystalline layer,
(d) a radiant energy transparent conducting layer conductively secured to said CdS layer, and
(e) output conductor means connected to said conductive substrate and said radiant energy transparent conducting layer.

### Claim 7 (depends on 6)

The invention defined in claim 6 wherein said CdS layer is formed in situ by thermal evaporation.

### Claim 8 (depends on 6)

The invention defined in claim 6 wherein said radiant energy transparent layer is a copper grid, with indium solder means conductively securing said copper grid to said CdS layer.

### Claim 9 (depends on 8)

The invention defined in claim 8 including a means for hermetically sealing said device from the ambient.

### Claim 10

A method of making a thin film CdSiAs.sub.2 -CdS solar cell comprising,
(a) forming a conductive substrate,
(b) forming a polycrystalline layer with large grain size by stoichiometrically sputtering CdSiAs.sub.2 on said substrate, using separate targets respectively comprising Cd, Si, and CdAs.sub.2, each said target having an ambient temperature of about 90.degree. C. to about 100.degree. C., said substrate having an ambient temperature of about 225.degree. C..+-.5.degree. C., with sputter bias voltages between about 0 to about 1000 volts,
(c) in situ forming said CdS layer on the surface of said CdSiAs.sub.2 layer, and
(d) applying an electrode to the said CdS layer.

### Claim 11 (depends on 10)

The invention defined in claim 10 wherein said conductive substrate includes a layer of molybdenum upon which said CdSiAs.sub.2 thin film is deposited.

### Claim 12 (depends on 11)

The invention defined in claim 11 including the step of thermally evaporating said CdS layer upon said CdSiAs.sub.2 layer.

### Claim 13 (depends on 11)

The invention defined in claim 11 the step of applying an electrode to said CdS layer includes adhering a radiant energy transparent grid to said CdS layer by a non-reactive solder.