# US 4,396,894 A · Digital noise generating apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 4,396,894 A - Document ID: US4396894A - Status: Granted - Kind: A - Application number: 05/847,469 - Filed: 1977-10-25 - Granted: 1983-08-02 - Earliest claimed: 1977-10-25 - Assignees: Westinghouse Electric Corp. - Inventors: Robert R. Willmore - Web page: https://patentgrep.com/patent/US4396894A ## CPC - H03B 29/00: Generation of noise currents and voltages {(gasfilled discharge tubes with solid cathode specially adapted as noise generators H01J17/005)} - H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H) ## Abstract A digital noise generator, wherein pseudo-random rapidly changing analog input voltages to a voltage controlled oscillator are used to generate corresponding rapidly changing discrete frequency outputs, is disclosed. Means are provided to delay the oscillator output by an amount at least equal to the rise time between each frequency change. The delayed and non-delayed oscillator outputs are electrically coupled through a switch that operates at times and at a rate to eliminate the rise time between frequency changes and thus improve the frequency spectrum. ## Claims ### Claim 1 A digital noise generating system for producing at its output discrete pseudo-random frequencies, comprising first means to generate a voltage having rapidly changing discrete value steps, a voltage controlled oscillator responsive to said voltage to generate a first train of discrete frequencies, each frequency corresponding to one of the voltage steps, second means governed by the discrete frequencies of the first train to produce a second train of discrete frequencies, each being delayed by a predetermined interval to overlap the rise time of the next discrete frequency of the first train, switching means operative when activated to a first condition to output the frequencies of the first train and when operated to its second condition to output the frequencies of the second train, and third means to activate the switching means to its first and second condition alternately at a time and rate to output a portion of each discrete frequency of one of said trains during the rise time of such frequency of the other of said trains. ### Claim 2 (depends on 1) A system according to claim 1 wherein the second means includes means to delay each of the frequencies by an interval at least equal to the rise time of each of the discrete frequencies. ### Claim 3 (depends on 1) A system according to claim 1 wherein the second means includes means to delay each of the frequencies by an interval greater than the rise time of each of the discrete frequencies. ### Claim 4 (depends on 1) A system according to claim 1 wherein the third means is activated between the first and second trains at a rate corresponding to one-half the duration of each discrete frequency. ### Claim 5 (depends on 1) A system according to claim 1 wherein the first means, comprises a shift register operative to generate a series of digital words in a pseudo-random sequence, a digital to analog converter to transform each said word to discrete voltage value, means to scale each of said discrete values to produce a plurality of values, each of said plurality corresponding to a different band of frequencies, and means to multiplex each of said plurality of discrete values to produce the rapidly changing discrete voltage steps. ### Claim 6 (depends on 5) A system according to claim 5 wherein the shift register includes means to generate digital words at approximately a six megahertz rate. ### Claim 7 A noise generating system for transmitting rapidly changing frequencies comprising a shift register operative to generate pseudo-random digital codes in succession at a predetermined rate, each code being representative of a discrete frequency, a digital to analog converter responsive to said generated codes to produce an analog signal, the value of which changes in accordance with each generated frequency code, a plurality of multipliers, each operative to scale the amplitude of the analog signal to conform to a predetermined different bandwidth of frequencies, a summing device for each multiplier operative to add a bias to the changing scaled analog signals to determine a value corresponding to the center frequency of its respective bandwidth, a first switch operative to multiplex the output signals of each summing device at a predetermined rate to produce an analog signal for each of the bandwidths in predetermined sequence, a voltage controlled oscillator responsive to each multiplexed voltage rate to generate at a first output a direct corresponding frequency, a delay line operatively connected to respond to each direct frequency to produce at a second output the same frequency but delayed in time at least equal to the rise time of the direct frequency, switching means including a third output pivotally connected to said first and second outputs to electrically couple to the third output said direct and delayed frequencies at times and at a rate to eliminate substantially the rise times of each said direct and delayed frequency, and means connected to the third output to transmit the selected portions of each of the direct and delayed frequencies.