# US 4,396,871 A · Arrangement for digital brightness control of lamps

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- Number: US 4,396,871 A
- Document ID: US4396871A
- Status: Granted
- Kind: A
- Application number: 06/235,832
- Filed: 1981-02-19
- Granted: 1983-08-02
- Earliest claimed: 1980-03-03
- Inventors: Klaus Scheuermann
- Web page: https://patentgrep.com/patent/US4396871A

## CPC

- H05B 39/09: in which the lamp is fed by pulses {(automatic circuit devices built into or on the incandescent lamp H01K1/625; vehicle winking devices B60Q1/38)}
- H05B 47/155: Coordinated control of two or more light sources
- H05B: ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL

## Abstract

The invention relates to an arrangement for digital brightness control of lamps or groups of lamps in control channels particularly for use in planetarium illumination comprising in each control channel a programmable counter, a bistable flip-flop, and a power control stage. Each control channel is connected to a mains synchronizing stage and to a pulse generator. The control channel produces a mains synchronous pulse sequence frequency the pulse width repitition ratio of which depends on the selected division ratio of the programmable counter. The inventional solution offers a simple digital and controllable circuit arrangement for control of thyristors or triacs or transistors which, in turn, control the brightness of lamps or lamp groups.

## Claims

### Claim 1

An arrangement for digital brightness control of lamps in control channels, particularly for use in planetaria illuminations, comprising
at least one lamp,
at least one power control stage for brightness control of said lamp in digitally divided steps of a brightness raster,
at least one programmable counter having a counter input, a set input and an output,
at least a bistable flip-flop having two inputs and one output,
at least a gate circuit having two inputs and one output,
said lamp, said power control stage, said counter, said flip-flop and said gate circuit constituting one of said control channels,
said output of said flip-flop being connected to one of said two inputs of said gate circuit and to said input of said power control stage,
said output of said power control stage being connected to said lamp,
said gate circuit output being connected to said counter input, said counter output being connected to one of said two flip-flop inputs,
said counter being programmable via said set input,
a mains synchronizing stage having two inputs and one output,
said synchronizing stage being for producing mains synchronous pulses,
said output of said synchronizing stage being connected to the other of said two flip-flop inputs,
a voltage source being connected to the one of said two inputs of said synchronizing stage,
a pulse generator being connected to the other of said two inputs of said synchronizing stage and to the other of said two inputs of said gate circuit,
said pulse generator being for producing a pulse sequence frequency corresponding to the frequency of the mains synchronous pulses divided by steps determined by the bit number of said brightness raster.

### Claim 2 (depends on 1)

An arrangement as claimed in claim 1, wherein said pulse generator and said counter are integral components of a digital computer.