# US 4,395,703 A · Precision digital random data generator

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- Number: US 4,395,703 A
- Document ID: US4395703A
- Status: Granted
- Kind: A
- Application number: 06/278,261
- Filed: 1981-06-29
- Granted: 1983-07-26
- Earliest claimed: 1981-06-29
- Assignees: Motorola, Inc.
- Inventors: Gerald V. Piosenka
- Web page: https://patentgrep.com/patent/US4395703A

## CPC

- G06F 7/588: {Random number generators, i.e. based on natural stochastic processes}
- H03K 3/84: Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A precision digital random data generator comprising a matched pair of D-type flip-flops, a differential amplifier for comparing integrated outputs of the flip-flops, provisions for a noisy analog input of the general type (n)t feeding one input of the comparator with the output of the comparator feeding a D input of one of the D type flip-flops which generates an output which statistically correlates with the analog input and is also fed to the other input of the comparator.

## Claims

### Claim 1

An electronic circuit for amplifying and synchronizing a random analog input noise signal having a statistical characteristic to produce a useful random data digital signal, the digital signal having statistical characteristics essentially the same as the characteristics of the random analog signal, the circuit comprising:
a system clock signal input;
first integrator means connected to said input for generating a first integrated signal from a system clock signal applied to said input;
a second integrator means connected to said input for generating a second integrated signal utilizing the system clock signal and for generating the random data digital signal at an output thereof;
both integrator means being clocked at the same rate;
means for comparing said first and second integrated signals and for generating an output of said comparing means responsive to said comparison, said output of said comparing means being a second input of said second bias means; and
means for applying a time varying noise signal in superposition with said first integrated signal.

### Claim 2 (depends on 1)

The electronic circuit according to claim 1 wherein at least one of said first and second integrator means further comprises:
a low pass filter.

### Claim 3 (depends on 2)

The electronic circuit according to claim 2 wherein at least one of said first and second integrator means further comprises:
a flip-flop.

### Claim 4 (depends on 1, 2, 3)

The electronic circuit according to claim 1, 2 or 3 wherein at least an active portion of each of said first and second integrator means comprises a single monolithic circuit and wherein said active portions are on a single monolithic semiconductor chip.
