# US 4,395,682 A · Differential output circuit

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- Number: US 4,395,682 A
- Document ID: US4395682A
- Status: Granted
- Kind: A
- Application number: 06/220,722
- Filed: 1980-12-29
- Granted: 1983-07-26
- Earliest claimed: 1979-12-28
- Assignees: Matsushita Electric Industrial Co., Ltd.
- Inventors: Nobuyoshi Yokobori; Tetsuo Maeda; Yoshiaki Igarashi
- Web page: https://patentgrep.com/patent/US4395682A

## CPC

- H03F 3/3081: {Duplicated single-ended push-pull arrangements, i.e. bridge circuits (using FET's H03F3/3061)}
- H02P 6/14: Electronic commutators
- H03F: AMPLIFIERS
- H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS

## Abstract

A differential output circuit for generating a bipolar DC current for an armature winding without requiring a bipolar power source. A combination of transistors and resistors are utilized to effectively apply a bipolar driving current. The use of only transistors and resistors in the differential output circuit enables its easy implementation as an integrated circuit.

## Claims

### Claim 1

A differential output circuit comprising: a two-phase differential amplifier which has a first output which changes its output voltage in response to a voltage applied to a first input and has a second output which changes its output voltage in response to a voltage applied to a second input, said differential amplifier being driven by a single power source; a load which is connected between said first and second outputs, said first output and first input being connected together by a first negative feedback resistor, said second output and second input being connected together by a second negative feedback resistor; a first resistor and a second resistor are respectively connected at one end thereof with said first and second inputs; wherein said load is supplied with current flowing either in a normal or reverse direction according to the polarity of a potential difference between the other ends of said first and second resistors.

### Claim 2 (depends on 1)

A differential output circuit according to claim 1, further comprising first and second switches which are respectively interposed between said first and second outputs and a negative pole of said power source, wherein said first and second switches are driven so as to connect said first output with said negative pole of said power source when said potential difference between the other ends of said first and second resistors is positive or zero, and are driven so as to connect said second output with said negative pole of said power source when said potential difference is negative or zero.

### Claim 3 (depends on 1)

A differential output circuit according to claim 1, further comprising third and fourth switches which are respectively interposed between said first and second outputs and a positive pole of said power source, wherein said third and fourth switches are driven so as to connect said second output with said positive pole of said power source when said potential difference between the other ends of said first and second resistors is positive or zero, and driven so as to connect said first output with said positive pole of said power source when said potential difference is negative or zero.

### Claim 4 (depends on 2, 3)

A differential output circuit according to claim 2 or claim 3, wherein transistors comprise said switches.

### Claim 5 (depends on 1)

A differential output circuit according to claim 1, further comprising a resistance which is interposed between said first and second outputs supplying current to said load and either one of positive and negative poles of said power source, wherein load current flows in common from said first and second outputs, thereby detecting the absolute value of said load current.