# US 4,394,588 A · Controllable di/dt push/pull driver

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- Number: US 4,394,588 A
- Document ID: US4394588A
- Status: Granted
- Kind: A
- Application number: 06/221,687
- Filed: 1980-12-30
- Granted: 1983-07-19
- Earliest claimed: 1980-12-30
- Assignees: International Business Machines Corporation
- Inventors: Gene J. Gaudenzi
- Web page: https://patentgrep.com/patent/US4394588A

## CPC

- H03K 5/02: by amplifying (H03K5/04 takes precedence)
- H03K 19/082: using bipolar transistors
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A driver circuit to limit the di/dt downgoing transition to a desired value employs an active feedback path. The driver circuit utilizes a Schottky Barrier Diode as a current bleed to limit the base current of the drive circuit transistor. The active feedback path includes a normally conductive transistor which turns off when the output falls to a predetermined level. Elimination of the active feedback path in this condition insures maximum DC drive.

## Claims

### Claim 1

A circuit for limiting the time-rate of change of down-going transitions of a signal present at the output terminal of an active collector driver, comprising a first transistor having a base coupled to a signal input terminal and a collector coupled to a means for providing a supply voltage and an emitter coupled to ground, a second transistor having a collector coupled to said output terminal and an emitter coupled to ground for pulling-down said signal present at said output terminal to a low state, impedance means coupled to said first transistor and the base of said second transistor for limiting the base current of said second transistor, pull-up means coupled to said output terminal for pulling-up said signal present at said output terminal to a high state, a feedback path coupled to said output terminal and said impedance means for limiting said time-rate of change of said downgoing transition of said output signal, and switch means for clamping said feedback path to ground.

### Claim 2 (depends on 1)

The circuit of claim 1 wherein said impedance means comprises a Schottky barrier diode coupled in parallel with the base-emitter junction of said second transistor.

### Claim 3 (depends on 2)

The circuit of claim 2 wherein said switch means comprises a third transistor, which receives said output signal, said third transistor rendered conductive when the output signal is at a high state relative to said input and cut off to eliminate said feedback path when the input is at a high state relative to said output and said second transistor is conducting.

### Claim 4 (depends on 3)

The circuit of claim 3 further comprising resistor means coupled in said feedback path to control the cutoff point of said third transistor.

### Claim 5 (depends on 1)

The circuit of claim 1 further comprising Schottky barrier diodes coupled across the base and collector of said first and second transistors to prevent said first and second transistors from being saturated.

### Claim 6 (depends on 1)

The circuit of claim 1 further comprising an output coupled to said second transistor, wherein if the output of said second transistor is low, said feedback path will limit the current in said second transistor if a high level voltage is applied to said output.