# US 4,393,574 A · Method for fabricating integrated circuits

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- Number: US 4,393,574 A
- Document ID: US4393574A
- Status: Granted
- Kind: A
- Application number: 06/213,617
- Filed: 1980-12-05
- Granted: 1983-07-19
- Earliest claimed: 1980-12-05
- Assignees: Kabushiki Kaisha Daini Seikosha
- Inventors: Masafumi Shimbo
- Web page: https://patentgrep.com/patent/US4393574A

## CPC

- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10D 84/0107: {Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs}
- H10D 84/0109: {the at least one component covered by H10D12/00 or H10D30/00 being a MOS device}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/82: of only field-effect components
- H10P 14/271: {characterised by the preparation of substrate for selective deposition}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3418: {Phosphides}
- H10P 14/3421: {Arsenides}
- H10W 10/018: {using selective deposition of crystalline silicon, e.g. using epitaxial growth of silicon}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of fabricating integrated circuits comprises forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate, forming an insulating film on the faces of the concave portion except for at least a portion of the bottom face, and forming a first semiconductor growth layer on the insulating film-free portion of the bottom face of the concave portion by chemical vapor deposition using a mixture gas containing semiconductor chloride and hydrogen such that the top surface of the growth layer is the same level as the upper face of the substrate in the region adjoining the concave portion. Semiconductor devices are then fabricated in the substrate and growth layer. Alternatively, the first growth layer can be formed on the substrate and thereafter a concave portion can be etched in the first growth layer and then a second semiconductor growth layer can be formed on the bottom face of the concave portion such that the top surfaces of the first and second growth layers are at the same level. In another variation, the first growth layer can extend above the substrate surface, and a second growth layer can be formed on the substrate such that the top surface of the second growth layer is at the same level as that of the first growth layer.

## Claims

### Claim 1

A method for fabricating integrated circuits comprising the steps of:
forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate;
forming an insulating film on the faces of said concave portion except for at least one portion of the bottom face of said concave portion;
forming a first semiconductor growth layer on the bottom face of said concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas containing semiconductor chloride and hydrogen such that the top surface of the growth layer is at the same level as the upper face of the substrate in the region adjoining said concave portion; and,
fabricating semiconductor devices in said substrate and said growth layer.

### Claim 2

A method for fabricating integrated circuits comprising the steps of:
forming a first semiconductor growth layer on a semiconductor single-crystal substrate by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen; selectively etching the first semiconductor growth layer to form therein a concave portion having bottom and side faces;
forming an insulating film on at least one side face of the concave portion;
forming a second semiconductor growth layer on the bottom face of the concave portion, the second semiconductor growth layer being separated from the first semiconductor growth layer by said insulating film and the top surface of the second semiconductor growth layer being at the same level as the top surface of the first semiconductor growth layer; and
fabricating semiconductor devices in said substrate and first and second growth layers.

### Claim 3

A method for fabricating integrated circuits comprising the steps of:
forming a concave portion having bottom and side faces on a semiconductor single-crystal substrate;
forming an insulating film on the faces of the concave portion except for at least one portion of the bottom face of the concave portion;
forming a first semiconductor growth layer on the bottom face of the concave portion which is free of the insulating film by chemical vapor deposition using a mixture gas of semiconductor chloride and hydrogen such that the top surface of the growth layer extends a given distance above the upper surface of the substrate;
forming a second semiconductor growth layer on the substrate such that the top surface of the second semiconductor growth layer is at the same level as the top surface of the first semiconductor growth layer; and
fabricating semiconductor devices in said substrate and first and second growth layers.

### Claim 4 (depends on 1, 2, 3)

A method for fabricating integrated circuits as claimed in claim 1, 2 or 3; wherein said step of fabricating semiconductor devices comprises fabricating at least one insulated gate type field effect transistor in said substrate and fabricating at least one bi-polar transistor or junction type field effect transistor in said first growth layer.

### Claim 5 (depends on 2, 3)

A method for fabricating integrated circuits as claimed in claim 2 or 3; wherein said step of fabricating semiconductor devices comprises fabricating a junction type field effect transistor in said first growth layer and fabricating a field effect transistor or a bi-polar transistor in said second growth layer.