Integrated circuit for timepiece

A circuit for a hybrid timepiece, said timepiece comprising:

• timekeeping circuit means including oscillator means for generating a high frequency standard signal, divider means for dividing down said high frequency standard signal to a lower frequency timekeeping signal, controller means for shaping signals from said divider means;
• an external power supply for powering a portion of the circuits of said hybrid timepiece;
• booster circuit means operating from said power supply for outputting a boosted voltage at a level exceeding the voltage of said power supply, another portion of circuits of said timepiece operating on said boosted voltage;
• a liquid crystal display and means for driving said liquid crystal display, said means for driving said liquid crystal display operating on said boosted voltage in response to said lower frequency timekeeping signal;
• a step motor driving an analog display;
• integrated circuit means for providing driving current pulses to said step motor in response to said shaped signals from said divider means, said integrated circuit means for providing driving current pulses to said step motor including at least one CMOS transistor pair, the source and drain terminals of said at least one CMOS transistor pair operating on said power supply voltage, the gates of said at least one CMOS transistor pair being driven by signals at said boosted voltage level.