US 4,392,112 AGranted

Low drift amplifier

AssigneeRCA Corporation

InventorOtto H. Schade, Jr.

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Abstract

A differential amplifier is arranged to exhibit substantially no D.C. offset or drift. Input signal is alternately connected to the non-inverting and inverting input terminals of an input differential stage. Synchronously therewith the differential output signals of the differential stage are interchanged to maintain the sense of the output signal constant. The synchronous interchanging of differential input and differential output signals tends to average out parameter offset in the input circuit elements. The differential input stage is provided with a substantially balanced active current mirror load. The current mirror load devices are commutated with respect to the input devices to further reduce amplifier offset arising inherently in the differential stage load elements. The commutation of the current mirror load elements is performed at a rate which is a multiple of the rate at which the input and output signals are interchanged.

Claims7

Dependent claims

A differential amplifier circuit comprising;

inverting and non-inverting input terminals and an output terminal;
a differential transistor pair having first and second input terminals and first and second output terminals;
first and second load means;
first means for alternately connecting said first load means to said first and second output terminals of the differential transistor pair and concurrently alternately connecting said second load means to said second and first output terminals of the differential transistor pair at a first cyclic rate, said first and second load means and said differential transistor pair thereby forming a differential amplifier stage, the load presented to each output terminal of the differential pair being the time average of the first and second load means;
second means for alternately connecting said inverting input terminal to the first and second input terminals of the differential pair and concurrently alternately connecting the non-inverting input terminal to the second and first input terminals of the differential pair at a second cyclic rate;
and
third means alternately connecting the first and second output terminals of said differential transistor pair to said output terminal at said second cyclic rate, the alternate connection of input terminals, output terminals and load means tending to average out offsets in the circuitry and thereby reducing DC input offset and drift.

4 more elements

A differential amplifier comprising:

first and second signal input terminals and an output terminal;
first and second transistors of a first conductivity type and fourth and third transistors of a second conductivity type complementary to said first conductivity type, each transistor having respective first and second electrodes and respective principal conduction paths therebetween, having respective control electrodes, the principal conduction path of each transistor being controlled by potential applied between its respective control and first electrode;
a current source;
means interconnecting the first electrodes of said first and second transistors and said current source as a differential amplifier input transistor pair;
means connecting the first electrodes of the third and fourth transistors;
means for commutating at a first rate, connection of the respective second electrodes of the fourth and third transistors to the second electrodes of the first and second transistors, said third and fourth transistors arrange to operate as active load devices for said differential transistor pair;
means for commutating at a second rate, connection of the first and second signal input terminals respectively to the control electrodes of the first and second transistor;
and
means for commutating at said second rate, connection of the second electrodes of said first and second transistors to said output terminal.

6 more elements

Dependencies are inferred from the claim text.