# US 4,391,146 A · Parallel T impedance measurement circuit for use with variable impedance sensor

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- Number: US 4,391,146 A
- Document ID: US4391146A
- Status: Granted
- Kind: A
- Application number: 06/269,415
- Filed: 1981-06-01
- Granted: 1983-07-05
- Earliest claimed: 1981-06-01
- Assignees: Rosemount Inc.
- Inventors: Earl A. Grindheim
- Web page: https://patentgrep.com/patent/US4391146A

## CPC

- G01D 5/14: influencing the magnitude of a current or voltage
- G01L 9/125: {with temperature compensating means (non electric temperature compensating means G01L19/04)}
- G01D: MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G)

## Abstract

A circuit for measuring a parameter to be sensed by means of at least one variable impedance sensor responsive to such parameter. The circuit includes a frequency determining means coupled to the variable sensor for providing an oscillatory frequency signal responsive to the impedance of the sensor, a signal amplifier coupled to the frequency determining means for amplifying the frequency signal to provide an output signal representative of the frequency signal and to sustain circuit oscillation, a signal detector coupled to the output signal to provide a control signal representative of such output signal, and a control coupled to receive the control signal and coupled to the frequency determining means thus allowing the oscillatory frequency signal of the circuit to oscillate at a frequency representative of the measured parameter.

## Claims

### Claim 1

A parallel T oscillator circuit for providing an output signal having a frequency representative of a variable impedance which is reponsive to a parameter to be sensed, the circuit comprising:
frequency determining means, coupled to the variable impedance to form a parallel T circuit having an input and an output, for providing at the output an oscillatory frequency signal having a frequency which is a function of the variable impedance;
signal amplification means for amplifying the oscillatory frequency signal to provide the output signal, the signal amplification means having an input coupled to the output of the parallel T circuit for receiving the oscillatory frequency signal and having an output for providing the output signal, the output of the signal amplification means being coupled to the input of the parallel T circuit to sustain oscillation of the frequency determining means;
detection means coupled to the output of the signal amplification means for providing a direct current control signal which is a function of amplitude of the output signal; and
control means, responsive to the control signal and coupled to the frequency determining means, for enabling the oscillatory frequency signal to oscillate at a frequency representative of the variable impedance.

### Claim 2 (depends on 1)

A circuit according to claim 1 wherein the variable impedance comprises at least one variable capacitor.

### Claim 3 (depends on 2)

A circuit according to claim 2 wherein the frequency determining means comprises a resistance network coupled to the variable imepdance and a fixed impedance network coupled together to the control means to comprise the parallel T network.

### Claim 4 (depends on 3)

A circuit according to claim 3 wherein the variable capacitor has a known minimum capacitance and wherein the resistance network, the fixed impedance network and the minimum capacitance of the variable capacitor determine an initial frequency of the oscillatory frequency signal and the variable capacitor varies from the minimum capacitance in response to the parameter to be sensed thus varying the frequency of the oscillatory frequency signal from the initial frequency.

### Claim 5 (depends on 3)

A circuit according to claim 3 wherein the resistance network comprises at least two resistors coupled together and wherein a terminal of the variable capacitor is coupled therebetween.

### Claim 6 (depends on 5)

A circuit according to claim 5 wherein the fixed impedance network comprises at least two fixed capacitors connected together and wherein the control means is coupled therebetween.

### Claim 7 (depends on 6)

A circuit according to claim 6 wherein the combination of the resistors of the resistance network and the variable capacitor and the combination of the fixed capacitors, of the fixed impedance network are coupled in parallel.

### Claim 8 (depends on 3)

A circuit according to claim 3 wherein the detection means comprises rectification means for rectifying the output signal to produce the direct current control signal.

### Claim 9 (depends on 8)

A circuit according to claim 8 wherein the rectification means comprises at least one diode.

### Claim 10 (depends on 8)

A circuit according to claim 8 wherein the detection means further comprises an AC coupling means for coupling the output signal from the signal amplification means to the rectification means.

### Claim 11 (depends on 9)

A circuit according to claim 9 wherein the detection means further comprises an AC coupling means for isolating the direct current operating level of the output signal from the detection means.

### Claim 12 (depends on 8)

A circuit according to claim 8 wherein the detection means further comprises a filter means coupled to the rectification means for smoothing the direct current control signal.

### Claim 13 (depends on 12)

A circuit according to claim 12 wherein the filter means comprises at least one capacitor.

### Claim 14 (depends on 1)

A circuit according to claim 1 wherein the control means is coupled to the frequency determining means to provide a controllable impedance which is varied as a function of the control signal to control an oscillatory condition of the frequency determining means.

### Claim 15 (depends on 14)

A circuit according to claim 14 wherein the control means is a depletion mode, field effect transistor.

### Claim 16 (depends on 15)

A circuit according to claim 15 wherein the depletion mode, field effect transistor has a drain, a source and a gate.

### Claim 17 (depends on 16)

A circuit according to claim 16 wherein the gate receives the direct current control signal and the drain is coupled to the frequency determining means.

### Claim 18 (depends on 14)

A circuit according to claim 14 wherein the control means provides an adjustable resistance responsive to the direct current control signal to the frequency determining means.

### Claim 19 (depends on 3, 7, 8, 15, 16, 18)

A circuit according to claims 3, 7, 8, 15, 16 or 18 further comprising isolation means coupled to the output of the signal amplification means for reducing effects of external loading on the circuit.

### Claim 20

A circuit for measuring the capacitance of a variable capacitor which is responsive to an external stimulus, the circuit comprising:
a parallel T network including the variable capacitor, the network having an input, an output and a characteristic impedance, for providing a frequency signal at the output which has a frequency and amplitude representative of the external stimulus;
signal amplification means coupled to output of the parallel T network for providing to the input of the parallel T network an alternating current output signal representative of the frequency signal;
detection means coupled to the amplification means for rectifying the alternating current output signal to produce a direct current control signal which is a function of the amplitude of the output signal; and
control means coupled to the parallel T network for changing the characteristic impedance of the parallel T network responsive to the control signal to enable the frequency signal to oscillate at a frequency representative of the external stimulus.

### Claim 21 (depends on 20)

A circuit according to claim 20 wherein the control means is a variable resistance.

### Claim 22 (depends on 20)

A circuit according to claim 20 wherein the control means is a depletion mode, field effect transistor.

### Claim 23 (depends on 22)

A circuit according to claim 22 wherein the field effect transistor has a drain, a source, and a gate, and wherein the gate receives the control signal to change resistance between the drain to source responsive to the control signal.

### Claim 24 (depends on 20)

A circuit according to claim 20 wherein the control means is a junction field effect transistor.

### Claim 25

A circuit for providing an output which is a function of first and second parameters, the circuit comprising
a first circuit for producing a first parameter output signal having a frequency representative of the first parameter, the first circuit comprising:
first variable impedance sensor means for sensing the first parameter, the first variable impedance sensor means having a first variable impedance which is a function of the first parameter;
first frequency determining means, coupled to the first variable impedance sensor means to form a first parallel T circuit having an input and output, for providing at the output a first oscillatory frequency signal having a frequency which is a function of the first variable impedance;
first signal amplification means for amplifying the first oscillatory frequency signal to produce the first parameter output signal, the first signal amplification means having an input coupled to the output of the first parallel T circuit for receiving the first oscillatory frequency signal and having an output for providing the first parameter output signal, the output of the first signal amplification means being coupled to the input of the first parallel T circuit to sustain oscillation of the first parallel T circuit;
first detection means coupled to the output of the first signal amplification means for providing a direct current first control signal which is a function of amplitude of the first parameter output signal; and
first control means responsive to the first control signal and coupled to the first frequency determining means for enabling the first oscillatory frequency signal to oscillate at a frequency representative of the first variable impedance;
a second circuit for producing a second parameter output signal having a frequency representative of the second parameter, the second circuit comprising:
second variable impedance sensor means for sensing the second parameter, the second variable impedance sensor means having a second variable impedance which is a function of the second parameter;
second frequency determining means, coupled to the second variable impedance sensor means to form a second parallel T circuit having an input and output, for providing at the output a second oscillatory frequency signal having a frequency which is a function of the second variable impedance;
second signal amplification means for amplifying the second oscillatory frequency signal to produce the second parameter output signal, the second signal amplification means having an input coupled to the output of the second parallel T circuit for receiving the oscillatory frequency signal and having an output for providing the second parameter output signal, the ouput of the second signal amplification means being coupled to the input of the second parallel T circuit to sustain oscillation of the second parallel T circuit;
second detection means coupled to the output of the second signal amplification means for providing a direct current second control signal which is a function of amplitude of the second parameter output signal; and
second control means responsive to the second control signal and coupled to the second frequency determining means for enabling the second oscillatory frequency signal to oscillate at a frequency representative of the second variable impedance; and
processor means responsive to the first and second parameter output signals for providing the output which is a function of the first and second parameters.

### Claim 26 (depends on 25)

A circuit according to claims 25 and further comprising memory means coupled to the processor means for storing compensation data for the first parameter output signal based upon the second parameter output signal.

### Claim 27 (depends on 26)

A circuit according to claim 26 and further comprising lock up means coupled to the second parameter output signal and coupled to the memory means for locating in the memory means the compensation data based upon the second parameter output signal.

### Claim 28 (depends on 27)

A circuit according to claim 27 wherein the processor means combines the compensation data based upon the second parameter output signal and the first parameter output signal to provide a compensated first parameter output signal as the output which is a function of the first and second parameters.

### Claim 29 (depends on 28)

A circuit according to claim 28 wherein the first parameter is pressure.

### Claim 30 (depends on 29)

A circuit according to claim 29 wherein the output is representative of a differential pressure comprising at least a first and a second pressure, and the first parameter is the first pressure and the second parameter is the second pressure.

### Claim 31 (depends on 29)

A circuit according to claim 29 wherein the second parameter is temperature.

### Claim 32 (depends on 29)

A circuit according to claim 29 wherein the second parameter is a function of an environment to which the first and second sensor means are exposed.

### Claim 33 (depends on 30)

A circuit according to claim 30 wherein the second parameter is a reference condition.

### Claim 34

A circuit for providing an output signal having a frequency which is representative of a sensed parameter, the circuit comprising:
sensing means for sensing the parameter, the sensing means exhibiting a variable impedance which is a function of the parameter;
controllable impedance means for providing a controllable impedance which is a function of a direct current control signal;
frequency determining means, connected to the sensing means and the controllable impedance means to form a parallel T circuit, for receiving the output signal and providing an oscillatory frequency signal which has a frequency which is a function of the variable impedance and the controllable impedance;
signal amplification means for amplifying the oscillatory frequency signal to produce the output signal; and
detection means for providing the direct current control signal to the controllable impedance means as a function of amplitude of the output signal.
