US 4,384,277 AGranted

Digital to analog converter

AssigneeMotorola, Inc.

InventorsRobert N. Allgood, Stephen H. Kelley

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Abstract

An operational amplifier capable of selectively performing a variety of circuit functions is provided. A single operational amplifier utilizes switched capacitors for sampling and holding an input signal, for establishing a low frequency pole, for applying the sample to an output capacitance to charge the capacitance and for comparing the input signal with a reference. The multi-function circuit provides a large savings in circuit area and permits versatility of circuit applications. One embodiment of the invention is to utilize a companding DAC having a capacitor array which may be used as the output capacitance of the operational amplifier circuit. The DAC provided utilizes an R ladder DAC coupled directly to a C DAC and has a switching structure that is simpler than comparable prior art circuits. The DAC is asynchronous and has programmable A-and Mu-255 law PCM conversion capability. Coupled directly to the C DAC is an operational amplifier receive filter circuit which utilizes the C DAC as an input capacitor thereby eliminating the need for a buffer amplifier and allowing the DAC to be used for both analog to digital and digital to analog conversion.

Claims14

Dependent claims

In a converter for providing an analog output signal corresponding to a digital input code, comprising:

voltage divider means for providing a step voltage selected between first and second reference voltages in response to the digital input code, comprising:
resistance means coupled between the first and second reference voltages, for developing on each of a rank ordered plurality of step nodes a predetermined step voltage between the first and second reference voltages;
and
R ladder switching means coupled between the resistance means and a common rail, for coupling, in response to the digital input code, a selected one of the step nodes to the common rail;
and
charge redistribution means coupled to the common rail, for providing the analog output signal as a function of the step voltage on the common rail and the digital input code, comprising:
capacitance means comprising a rank ordered
plurality of capacitors having respective first plates and interconnected second plates, for developing the analog output signal on the second plates as a function of the voltages coupled to the first plates, wherein the improvement comprises:
C ladder switching means having a rank ordered plurality of C rung switching elements and a rank ordered plurality of C rail switching elements coupled to the first and second reference voltages, the common rail and each of the first plates of the capacitors, for coupling, in response to the digital input code, the step voltage on the common rail to the first plate of a selected one of the capacitors, the first reference voltage to the first plates of each of the capacitors of lower rank than the selected one of the capacitors, and the second reference voltage to the first plates of each of the capacitors of higher rank than the selected one of the capacitors.

6 more elements

A converter for providing an analog output signal corresponding to a digital input code, comprising:

voltage divider means for providing a step voltage selected between first and second reference voltages in response to the digital input code, comprising:
resistance means coupled between the first and second reference voltages, for developing on each of a plurality of step nodes a predetermined step voltage between the first and second reference voltages;
R ladder switching means coupled between the resistance means and a common rail, for coupling, in response to the digital code, a selected one of the step nodes to the common rail;
and
charge redistribution means coupled to the common rail, for providing the analog output signal as a function of the step voltage on the common rail and the digital input code, comprising:
capacitance means comprising a rank ordered plurality of capacitors having respective first plates and interconnected second plates, for developing the analog output signal on the second plates as a function of the voltages coupled to the first plates;
a C rung switching network comprising a rank ordered plurality of C rung switching elements, each coupled between the first plate of a respective one of the capacitors and the common rail, for coupling a respective one of the first plates to the common rail in response to a respective C rung enable signal;
a C rail switching network comprising a rank ordered plurality of C rail switching elements, the first of which is coupled between the first reference voltage and the first plate of the capacitor of lowest rank, the last of which is coupled between the second reference voltage and the first plate of the capacitor of highest rank, and the balance of which are coupled between the first plates of respective, successively ordered pairs of the capacitors, for decoupling, in response to a rail disable signal, the first plate of the selected one of the capacitors from the first plates of the capacitors of lower and higher rank;
and
C ladder logic means coupled to the C rung and C rail switching networks, for providing, in response to the digital input code, said C rung enable signal and said C rail disable signal.

7 more elements

Dependencies are inferred from the claim text.