Simulation circuit employing switched capacitors

An integratable switched capacitor floating impedance element which may be the parallel combination of an inductor and a capacitor, comprising:

• first and second nodes adapted for receiving an input voltage;
• first and second voltage follower means having input terminals connected to said first and second nodes, respectively, and having output terminals across which the input voltage is established;
• a first capacitor having a capacitance C1;
• integrator means including a second capacitor having a capacitance C2 associated therewith, and having an input and an output terminal;
• a third capacitor having a capacitance C3;
• and
• switch means associated with said first and third capacitors and being periodically operative in first and second non-overlapping switch states;
• operation of said switch means in the first state electrically connecting said first and third capacitors across the outputs of said voltage followers and across the nodes, respectively, for sampling and storing an input voltage;
• operation of said switch means in the second state electrically connecting said first capacitor to the input terminal of said integrator means for causing it to integrate the charge on said first capacitor and produce an output voltage that is proportional to the integral of the input voltage that is available at the output terminals of said voltage follower means, and electrically connecting said third capacitor between the output terminal of said integrator means and the output terminal of said first voltage follower means for causing said third capacitor to sample the integrated voltage;
• subsequent operation of said switch means in the next first state again electrically connecting said third capacitor to the nodes for discharging it from the sum of the input voltage and the integrated voltage to a new input voltage that is applied to the nodes.

An integratable switched capacitor circuit for simulating a grounded impedance element which may be the parallel combination of an inductor and a capacitor, comprising:

• first and second nodes adapted for receiving an input voltage;
• voltage follower means having an input terminal electrically connected to said first node and having an output terminal at which a voltage on said first node is established;
• coupling means for coupling said second node to a ground reference potential;
• a first capacitor having a capacitance C1;
• integrator means including a second capacitor having a capacitance C2 associated therewith, and having an input terminal and an output terminal;
• a third capacitor having a capacitance C3;
• and
• switch means associated with said first and third capacitors and being periodically operative in first and second non-overlapping switch states;
• operation of said switch means in the first state electrically connecting said first capacitor between the output terminal of said voltage follower means and said second node for causing it to sample the input voltage, and electrically connecting said third capacitor across said nodes for causing it to sample the input voltage;
• operation of said switch means in the second state electrically connecting said first capacitor in said integrator means for causing the latter to integrate the charge on said first capacitor and produce an output voltage that is proportional to the integral of the input voltage, and electrically connecting said third capacitor between the output terminal of said integrator means and one of the output terminal of said voltage follower means and ground for causing said third capacitor to also sample and store the integrated voltage;
• subsequent operation of said switch means in the next first state again electrically connecting said third capacitor across said nodes for adjusting the charge on said third capacitor to correspond to a new input voltage across said nodes.