Latchable fast settling digital to analog converter bit switch
AssigneeMotorola, Inc.
InventorGregory J. Smith
Life of this patent
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Abstract
A latchable bit switch for use in a digital-to-analog converter comprising four differential pairs of transistors and a capacitor. The first pair are responsive to a digital input signal and an inverse digital input signal while the second pair are cross coupled and are responsive to the output of the first pair. The third pair are responsive to a toggle signal and a latch signal and enable either the first or second pair. The fourth pair are responsive to the output of the first and second pair and enable a bit current to a summing bus. The capacitor is coupled across the output of the first and second pair thereby reducing glitches in the bit current caused by the charging of junction capacitances by the fast transitions of the digital input, toggle, and latch signals.
Claims7
A latchable bit switch for use in a digital-to-analog converter for enabling a bit current generated by a bit current source to a summing bus, comprising:
- a data input differential pair of switching devices responsive to a digital input signal and an inverse digital input signal, said digital input signal having first and second states;
- a cross coupled differential pair of switching devices responsive to the output of said data input differential pair of switching devices;
- means for enabling a latch current generated by a latch current source to said data input differential pair of switching devices when receiving a toggle signal and to said cross coupled differential pair of switching devices when receiving a latch signal;
- a digital-to-analog differential pair of switching devices responsive to the output of said data input differential pair of switching devices and said cross coupled differential pair of switching devices for enabling said bit current when said digital input signal is in said first state and said toggle signal is being received by said means, said bit current being latched as long as said latch signal is being received;
- and
- a capacitor coupled across the output of said data input differential pair of switching devices and said cross coupled differential pair of switching devices for reducing glitches from said bit current.
An improved latchable bit switch for use in a digital-to-analog converter for enabling a bit current generated by a bit circuit source to a summing bus, having a data input differential pair of switching devices responsive to a digital input signal and an inverse digital input signal, said digital input signal having first and second states;
- a cross coupled differential pair of switching devices responsive to the output of said data input differential pair of switching devices;
- means for enabling a latch current generated by a latch current source to said data input differential pair of switching devices when receiving a toggle signal and to said cross coupled differential pair of switching devices when receiving a latch signal;
- a digital-to-analog differential pair of switching devices responsive to the output of said data input differential pair of switching devices and said cross coupled differential pair of switching devices for enabling said bit current when said digital input signal is in said first state and said toggle signal is being received by said means, said bit current being latched as long as said latch signal is being received;
- wherein the improvement comprises a capacitor coupled across the output of said data input differential pair of switching devices and said cross coupled differential pair of switching devices for reducing glitches from said bit current.
Dependencies are inferred from the claim text.