Semiconductor memory device

Abstract

A semiconductor memory device comprises an insulation layer and a plurality of polycrystalline silicon layer regions formed on the insulation layer. The polycrystalline silicon layer region includes a semiconductor element region and a meltable semiconductor fuse link region. The two regions are integrated with each other to constitute a unit memory cell. A plurality of unit memory cells connected between bit lines and word lines jointly constitute a memory device. Where required data is written in the memory device, then the semiconductor fuse region of a specified unit memory cell is melted away.

Dependencies are inferred from the claim text.