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US 4,382,285 AGranted
Filter for binary data with integral output amplitude multiplier
AssigneeMotorola, Inc.
InventorsTerence E. Sumner, James Ward, Alan L. Wilson
Life of this patent
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Abstract
A filter for digital data comprises a plurality of cascaded latches clocked to form a plurality of flip-flops. A series-parallel network of resistors connected to outputs of the latches renders the circuit a filter that can be constructed with a limited resistance ratio. A plurality of switches connected to outputs of the flip-flops and operated by those outputs effects both filtering and multiplication by a voltage that is switched into the resistive network by the switches.
Claims4
A multiplying filter for digital data comprising:
- a plurality of cascaded clocked latches, alternate latches of the plurality clocked oppositely so that pairs of adjacent latches form cascaded flip-flops;
- a plurality of voltage-operated switches, one of each of the switches connected to an output of one of the latches;
- a first voltage source connected to each of the plurality of switches and connected through upon a first signal from a latch;
- a second voltage source connected to each of the plurality of switches and connected through upon a second signal from a latch;
- a network of resistors, one of each of the resistors connected through one of the plurality of switches to one of the first and second voltage sources, the network having a central point that is an output of the filter.
2 more elements
Dependencies are inferred from the claim text.