N Indicator-switches connected for one of N selection by N wires
AssigneeSperry Corporation
InventorJoseph M. Cortner
Life of this patent
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Abstract
Any number N of light emitting diode (LED) push-button indicator-switches are connected by one wire each to a corresponding N interconnected assemblages of four cross-coupled logical elements each. A pushbutton activated signal input through a one connective wire causes a cross-coupled flip-flop storage action within the associated assemblage which will maintain the L.E.D. lit by outputting on the selfsame connective wire after the pushbutton is released. A one-shot circuit merged in each assemblage clears via the interconnect the stored signals of all other assemblages when a new pushbutton signal is activated. One of N selections between N indicator switches is thusly obtained with only one wire connection to each.
Claims7
A method for bidirectionally receiving and providing on a plurality of signal lines a plurality of parallel signals only one of which is presented at a time, said method comprising:
- receiving for a time as input a signal on any single one of said plurality of signal lines;
- latching, in response to the entire duration of said receiving, said received input signal into a single one of a plurality of storage elements which is uniquely associated with said single one of said plurality of single lines;
- initiating in response to said receiving a pulse signal which is shorter in duration than the time of said receiving;
- distributing said initiated pulse signal for the clearing of all said plurality of storage elements as associated with all said plurality of signal lines;
- and
- providing as output on said plurality of signal lines the set or cleared state of said plurality of storage elements;
- whereby because of said latching, longer in duration than said distributing for clearing, said providing as output will cause, after said receiving for a time, said latched received input signal to be output on the selfsame said signal one of said plurality of signal lines, whereas a cleared state will be output on all others of said plurality of signal lines.
An electrical circuit apparatus for bidirectionally receiving and providing on a plurality of signal lines a plurality of parallel signals only one of which is presented at a time, which apparatus comprises:
- a plurality of cross-coupled flip-flop storage action latching means associated with said plurality of signal lines for
- gating set by an associated received on of said plurality of parallel signals for the duration of said received signal as input on one of said plurality of signal lines,
- storing said associated received one of said plurality of parallel signals as input on one of said plurality of signal lines, and
- outputting on said associated received one of said plurality of signal lines the stored signal;
- a plurality of one-shot circuit means associated with said plurality of signal lines and merged with said plurality of latching means for providing, in response to an associated received one of said plurality of parallel signals received as input on one of said plurality of signal lines, a pulsed control signal shorter in duration than the time of said received one of said plurality of parallel signals;
- and
- interconnection wire means for distributing each said pulsed control signals on a clear signal input to all said plurality of latching means;
- whereby the clearing of all said latching means shorter in duration than the gating set of the one said latching means associated with said received one of said plurality of input signals will result in storing and outputting on only the one of said plurality of latching means which was associated with the one of said plurality of parallel signals.
A circuit appartus for connecting by N wires to a register of N indicator-switches so that the, and only the, indicator associated with the last activated switch will light, said apparatus comprising:
- a plurality of N replicated assemblies individually associated with each of said N indicator-switches, bidirectionally responsive through said N wires thereto, and each comprising the following elements:
- first logic inverter means for receiving as a first signal the state of said wire connected to sid indicator-switch and outputting as a second signal the inversion of said received signal,
- second logic inverter means for receiving said second signal and for outputting as a third signal the inversion of said second signal,
- delay means for receiving said third signal and for outputting as a fourth signal a non-inverted but time delayed variation of said third signal,
- first NAND gate means for receiving said third signal and said fourth signal and responsively thereto outputting a fifth signal which is the inverted logical ANDing of said third signal and said fourth signal,
- second NAND gate means for receiving said second signal and said fifth signal and responsively thereto outputting as a sixth signal logically wired ORed with said first signal the inverted logical ANDing of said second signal and said fifth signal;
- and
- wire interconnection means whereby all said plurality of N replicated assemblies are interconnectedly logically ORed in said fifth signal.
Dependencies are inferred from the claim text.