Digital-to-analog converter having open-loop voltage reference for regulating bit switch currents

A digital-to-analog converter circuit having a plurality of bit switch current sources responsive to a bias voltage for generating a plurality of bit switch currents, said digital-to-analog converter circuit including an open-loop voltage reference circuit for regulating the bias voltage, said open-loop voltage reference circuit comprising in combination:

• a. first and second power supply voltage conductors for conducting first and second power supply voltages, respectively;
• b. a reference voltage conductor for conducting a reference voltage;
• c. a first current leg coupled between said reference voltage conductor and said first power supply voltage conductor for conducting a first current and generating a reference voltage on said reference voltage conductor in response thereto, said first current leg including a zener diode junction;
• d. a second current leg coupled between said reference voltage conductor and said first power supply voltage conductor, said second current leg including a biasing transistor having first, second, and third terminals, said first terminal being coupled to said first power supply voltage conductor and said second terminal being coupled to said reference voltage conductor, said biasing transistor being biased by the reference voltage for conducting a second current in response thereto;
• e. current mirror means coupled to said second power supply voltage conductor, said current mirror means being coupled to said reference voltage conductor for providing the first current thereto, said current mirror means also being coupled to the third terminal of said biasing transistor and being responsive to the magnitude of the second current for maintaining the magnitude of the first current in a predetermined relationship therewith;
• and
• f. circuit means coupled to said reference voltage conductor for receiving the reference voltage and for providing the bias voltage in response thereto, said circuit means maintaining the bias voltage in a predetermined relationship with the reference voltage for maintaining said plurality of bit switch currents substantially constant, said circuit means including an emitter follower drive leg for providing a low impedance source of the bias voltage and for isolating said reference voltage conductor from transients imposed upon the bias voltage due to switching of the plurality of bit switch currents, said emitter follower drive leg including an emitter follower transistor having base and emitter terminals, the base terminal of said emitter follower transistor being coupled to said reference voltage conductor and the emitter terminal of said emitter follower transistor providing said bias voltage.