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US 4,381,010 AGranted
Heart pacemaker with integrated injection logic energy saving circuitry
AssigneeMedtronic, Inc.
InventorsDavid L. Thompson, Donald W. Zobel
Life of this patent
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AssigneeMedtronic, Inc.
InventorsDavid L. Thompson, Donald W. Zobel
Estimating the term…
An implantable heart pacemaker having digital injection integrated circuitry includes a bias switch (70) operative to turn on or increase the bias current to the pulse width logic (50) just prior to an output pulse. Increased bias to the pulse width logic permits high speed operation of the logic to accurately terminate the output pulse at the end of the desired pulse duration. At the end of the output pulse, the bias switch is turned off to return the bias current to a low quiescent value, and in some cases is turned completely off, to conserve battery power. The logic gates used in the pulse width logic are arrayed along one or more current injector "bars" or "rails" formed in the integrated circuit, and the bias switch (70) is connected for controlling the current delivered to those current injectors, so that increased bias need only be supplied to the circuits requiring high switching speed.
In a digitally controlled implantable heart pacemaker, a plurality of logic circuits interconnected to perform pacemaker control functions, first bias means for supplying bias current to a first group of said logic circuits, a second bias means for providing a switchable bias current to a second group of said logic circuits, and control means for controlling said second bias means and operative to increase bias current to said second group of logic circuits at selected intervals to increase the switching speed thereof during said selected intervals.
An integrated injection logic circuit for an implantable heart pacemaker comprising a plurality of logic cells or gates interconnected to perform pacemaker control functions including rate control logic for initiating a pacemaker output pulse at the end of a predetermined escape interval from a previous heart depolarization and pulse width control logic for terminating the pacemaker output pulse at a predetermined pulse duration, bias circuits for supplying bias current to the logic gates, a separate bias circuit for logic gates of the pulse width control logic, and bias switching circuit means connected for increasing bias current to said separate bias circuit upon initiation of a pacemaker output pulse and for reducing bias to said separate bias circuit during escape intervals between pacemaker output pulses.
An implantable heart pacemaker having low power consumption, comprising:
Dependencies are inferred from the claim text.