Frequency synthesizer of the phase lock loop type

A phase lock loop type frequency synthesizer for producing a synthesized frequency signal comprising:

• (a) a variable frequency oscillator for providing the synthesized frequency signal in response to a frequency control signal;
• (b) a clock pulse generator for producing a reference frequency signal;
• (c) a phase comparator for comparing the phases of first and second signals applied to first and second inputs thereof, thereby effecting production of the frequency control signal;
• (d) first and second means for coupling the variable frequency oscillator output and the clock pulse generator output to the first and second inputs of the phase comparator, respectively, one of said means digitally reducing the frequency of the respective frequency signal and applying the reduced frequency signal to the respective input of the phase comparator;
• (e) a successive addition rate multiplier, including an accumulator, for adding a predetermined increment Y to any accumulated values stored in the accumulator in response to each pulse of the reduced frequency signal, said multiplier producing an overflow pulse each time the capacity C (where C.gtoreq.Y) of the accumulator is exceeded while leaving the excess as residue in the accumulator;
• (f) means for producing a correction signal in response to said residue;
• and
• (g) means coupled to the phase comparator for correcting the frequency control signal in response to the correction signal to compensate for any variation in the frequency control signal caused by jitter in the pulse rate of the reduced frequency signal;
• characterized in that the means for producing a correction signal further includes a feedback loop responsive to any residual ripple on the frequency control signal to eliminate said ripple.