Memory addressing system for sequentially accessing all memory addresses in a memory area
AssigneeCanon Kabushiki Kaisha
InventorHiroshi Takahashi
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Abstract
An improved memory addressing system is incorporated in an electronic calculator having input keys for entering numerical data, operational instructions and memory control instructions, a memory for storing the numerical data, and a processor for executing the operational instructions and memory control instructions with numerical data transferred to or from the memory. The keys may be operated in a specific sequence that designates an area in the memory comprising a plurality of memory addresses. A detector detects actuation of the keys in the specific sequence and generates an output signal indicative thereof. A memory access control then sequentially accesses all of the addresses in the memory area in response to the output signal.
Claims3
A memory addressing system comprising:
- memory means having at least one memory area that includes a plurality of addressable locations;
- a keyboard including input keys being operable to designate different ones of said plurality of addressable memory locations, a plurality of said keys capable of being operated in at least one specific sequence to designate one said memory area;
- detecting means for detecting operation of said plurality of said keys in said one specific sequence to designate said one memory area and including means for generating an output signal indicative of said detection;
- and
- special access means for sequentially accessing all of said addressable memory locations in said one area in response to said output signal.
Dependencies are inferred from the claim text.