US 4,379,239 AGranted

Circuit for generating a trigger pulse

AssigneeFirma Atlas Fahrzeugtechnik GmbH

InventorsManfred Knuefelmann, Burkhard Brandner, Reinhold Blauhut

Life of this patent

Estimating the term…

Loading patent…

Abstract

Circuit for generating a trigger pulse delayed within a period of a periodical motion of variable periodic time, the phase lag relative to a zero phase being dependent on the periodic time and other parameters, a zero pulse and angle pulses starting at zero 5 phase being generated, the pulse frequency being inversely proportional to the periodic time, the angle pulses being fed into a counter and correcting data being generated within every period during a constant-time window. The technical problem the invention relates to is to design the circuit so that a single sequence of angle pulses may be evaluated and no control pulses are necessary except a reference pulse for defining a reference phase. According to the invention the following solution to the problem is proposed: during a constant-time window the angle pulses are varied under control so that each single pulse may be duplicated, counted normally, or suppressed. In this way correcting pulses according to individual characteristics may be generated during the time window.

Claims4

Dependent claims

Circuit for generating a trigger pulse delayed within a period of a motion of variable periodic time, the phase lag relative to a zero phase being dependent on the periodic time and other parameters, a zero pulse and angle pulses starting at zero phase being generated, the pulse frequency being inversely proportional to the periodic time, the angle pulses being fed into a counter and correcting data being generated within every period during a constant-time window, characterized by the following elements:

(a) During every period the angle pulses are counted by a phase address counter (20) the output of which provides a multi-bit address signal assigned to the respective angle pulse;
(b) the multi-bit address signal is fed into the input of a correction data memory (22) the output of which provides a multi-bit correction signal;
(c) the output of the correction data memory (22) can be disabled by the output pulse of a time window circuit (25)
(d) the angle pulses are fed into a controlled pulse duplicator (13) the duplicating input (14) of which is controlled by one bit of the multi-bit correction signal;
(e) the output of the controlled duplicator (13) is connected to a counter (15) with a disable input (17) controlled by a second bit of the multi-bit correction signal.

2 more elements

Dependencies are inferred from the claim text.