Loading patent…
AssigneeBurroughs Corporation
InventorRonald J. Dockal
Estimating the term…
In a peripheral controller for a card reader in an I/O subsystem, there is provided a buffer memory for storing, in separate dedicated portions, raw data from the card reader and translated data processed by a translator circuit means. Multiplexer means provide for the receipt and storage in memory of raw card data and/or receipt and storage of translated data which has been processed into selected formats for later transmittal to a main host system. A shift register translator, operating under commands from said host system, operates to take raw card data from said buffer-memory, and to format it into a desired word structure for re-storage in said buffer memory. The multiplexer means and a data register can then select the formatted data for transmittal to the main host system.
In a peripheral controller which interfaces a card reader peripheral mechanism to a host computer wherein said peripheral controller provides logic means to execute commands from said host computer and to return signals as to completion/incompletion of each command operation, said logic means including microcode sequencing means, and address data means, and wherein said card-reader peripheral mechanism reads cards having punched data in 12 rows and 80 columns, a memory buffer-translator circuit means comprising:
In a peripheral controller which interfaces a card reader peripheral mechanism to a host computer wherein said peripheral controller is organized into a common front end circuit for providing common logic functions suitable for all types of peripheral devices and into a peripheral dependent circuit tailored to control a specific type of peripheral mechanism under instructions provided by said common front end, and wherein a common logic means includes micro-code sequencing control means and address data means which operates to execute I/O commands initiated by said host computer for the reading out of data from a card reader peripheral mechanism which reads data cards having punched data in 12 rows and 80 columns, a memory buffer-translator circuit means comprising:
Dependencies are inferred from the claim text.