Digital data processing apparatus

A data processing unit comprising:

• a control section responsive to a control instruction to switch the processing unit from an idle mode to an execution mode, the control section being operative during the execution mode to initiate and control the sequence of execution of a program stored therein and to automatically switch the processing unit to the idle mode in which the control section is no longer operative to initiate and control the sequence of execution of a program stored therein,
• a memory section including an area of read/write memory,
• a computation section for performing calculations in accordance with instructions from the program and capable of accessing the read/write memory area during execution of the program,
• interface means having access to the area of read/write memory through which the processing unit is able to access an external memory when in its execution mode, through which at least part of the read/write memory area of the processing unit is able to be accessed from outside when in its idle mode and through which said control instruction for switching the processing unit from its idle to its execution mode is able to be received from outside;
• a predetermined part of the read/write memory area of the memory section which is accessible from outside via the interface means being adapted to receive said control instruction, and the control section including means for responding to the control instruction in the predetermined part of the read/write memory area,
• the interface means comprising a master interface means including a master address bus through which the processing unit is able to receive address words designating locations in its read/write memory and a master data bus through which the processing unit is able to receive or transmit data to be written into or read from the memory locations designated by said address words, through which a predetermined part of the externally accessible read/write memory area is able to be accessed from outside for control and monitor purposes when the processing unit is in both its idle and execution modes, and through which the remaining part of the externally accessible read/write memory area is able to be accessed from outside only when the processing unit is in its idle mode,
• and slave interface means including a slave address bus through which the processing unit is able to transmit memory addresses to an external memory area and a slave data bus through which data to be written into or read from the external memory is able to be transmitted or received, through which the processing unit is connectable to access the external memory area only when in its execution mode.