DC-Side commutated inverter
AssigneeCanadian Patents & Dev. Limited
InventorsPradeep M. Bhagwat, Victor R. Stefanovic
Life of this patent
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Abstract
The inverter may be single phase with one inverter leg or N-phase with N inverter legs for connection across a DC source. Each leg includes a pair of series connected thyristors with a terminal between the thyristors for connection to a load. In addition, each thyristor has a diode connected in reverse polarity across it. A commutation circuit which includes an inductor in series with the inverter legs and a capacitor in parallel with the inductor and the inverter legs, provides a commutation pulse to turn off the thyristors in each leg. A further isolating inductor is connected at the DC power input to the inverter, and a reverse polarity feedback diode may be connected across it.
Claims4
In an N-phase inverter having N parallel inverter legs connected across a pair of input lines for connection to a DC source and having isolation inductance means connected to the input lines, wherein each leg includes a pair of thyristors in series, an output terminal between the thyristors, and a diode connected in reverse direction across each thyristor;
- a commutation circuit for the N legs comprising:
- effective commutating inductance means L.sub.c including a first inductor L.sub.1 connected in series with the inverter legs, and a second inductor L.sub.2 connected in each of the inverter legs whereby L.sub.c =L.sub.1 +L.sub.2 /N;
- and
- commutating capacitance means connected across the effective inductance means and the inverter legs.
An N-phase inverter comprising:
- N parallel connected inverter legs connected across input lines for connection to a DC source, each inverter leg including first and second thyristor means connected in series, each of the first and second thyristor means having a diode connected in reverse direction across a thyristor;
- isolation inductance means connected to the input lines;
- and
- commutating circuit means for the N inverter legs including effective inductance means L.sub.c having a first inductor L.sub.1 connected in series between the isolation inductance means and the inverter legs and a second inductor L.sub.2 connected in each inverter leg whereby L.sub.c =L.sub.1 +L.sub.2 /N, and capacitance means in parallel with the effective inductance means and inverter legs for providing a commutation pulse for turning off the thyristors in all of the inverter legs.
Dependencies are inferred from the claim text.