Electronic security memory including on-off controlled oscillator

An electronic security memory comprising a first input for a d.c. supply voltage, a second input for a control signal, and an output, as well as a transistor oscillator, feedback being provided via a transformer from a primary winding of said transformer, to a first secondary winding, the primary winding being connected to the collector and the first secondary winding being connected to another electrode of the said transistor, in such a way that a feedback loop is formed in order to produce an oscillation whose frequency is determined by a first capacitor which is connected in parallel with said primary winding, said memory being reset to zero by interruption of the supply voltage, characterized in that the memory comprises a power amplifier which is powered via said first input, whose input voltage is supplied by a second secondary winding of said transformer, and which comprises two outputs, one direct current output which is supplied to a second capacitor whose charging voltage, during operation of said oscillator, enables said oscillation to be sustained, and a second, alternating current output which constitutes said output of the memory, said second input being connected to the collector of said transistor via a diode and supplying a d.c. control voltage having a value which is smaller than the value of the said charging voltage, said signal being capable of blocking said oscillator during its presence, and in the absence of an oscillation, its disappearance causing the oscillator to be unblocked and starting and maintaining an oscillation in the presence of said supply voltage.