Apparatus for detecting, correcting and logging single bit memory read errors using syndrome generating and decoding circuitry

In a data processing system, the combination comprising:

• selectively addressable storage means including a plurality of memories;
• addressing means for selectively writing into and reading out data from a selected one of said memories;
• means for providing a plurality of check bits along with data written into each memory location of said selected memory, said check bits being chosen so as to permit detecting and correcting of all single bit memory read errors appearing in memory data read from any location of said selected memory;
• local error detection and correction means, one for each said memory, for detecting and correcting said single bit memory read errors in data read from its respective memory and for automatically restoring corrected data back into the respective memory location whenever a single bit memory read error is detected;
• common error detection and correction means to which data read from each memory is applied without correction by its respective local error detection and correction means;
• said common error detection and correction means including:
• a syndrome generation means responsive to said applied memory data for generating a syndrome signal pattern indicating whether a single bit error is present in the applied memory data and if so the particular bit in error;
• syndrome decoding means responsive to said syndrome bit signal pattern for producing a single bit error signal indicating the presence of a single bit error;
• and
• single bit error correction means responsive to said syndrome pattern and said single bit error signal for correcting a single bit error occurring in said applied memory data;
• and
• selective error determining means operative in response to said single bit error signal, said addressing means, and said syndrome pattern for indicating when a detected single bit error in data read from a memory is likely to be hardware related by determining whether this same error has been consecutively detected a predetermined plurality of times for the same memory location.