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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsShiro Tsuji, Hiroshi Matsushima, Yasuharu Shimeki, Nobuyoshi Kihara, Misao Kato
Estimating the term…
Source data is organized by a time compression memory (4) into a plurality of successive groups of data words arranged in a pattern of rows and columns with the rows corresponding to respective recording tracks. A plurality of successive groups of parity check words is provided in the same pattern of rows and columns as the data words subsequent to the data word groups. Each parity check word is derived in a parity generator (6) by modulo-2 summations from the data words selected from different data word groups. The data and check words of each row of each respective group are (a) preceded by a synchronization code provided by a sync generator (10) to allow differentiation between data and parity groups, and (b) followed by a cyclic redundancy check, (CRC) code provided by a CRCC generator (9) to allow detection of an error in that data row or check words. The parity check word is used to correct an error specified by the CRC code upon detection of an error.
A method of processing data words comprising the steps of organizing the data words into successive patterns of rows and columns, deriving a plurality of first parity words from columnwise data words of each pattern, arranging the first parity words in a row parallel to the rows of data words, deriving a plurality of second parity words from diagonally arranged data words of each pattern, arranging the second parity words in a pattern of rows and columns in succession to the pattern of data words, generating a check code word, and appending the check code word to each row of said data and first and second parity words for enabling detection of errors in each row.
Apparatus for processing data words comprising means for organizing the data words into successive patterns of rows and columns, means for deriving a plurality of first parity words from columnwise data words of each pattern and arranging the first parity words in a row parallel to the rows of data words, means for deriving a plurality of second parity words from diagonally arranged data words of each pattern and arranging the second parity words in a pattern of rows and columns in succession to each pattern of data words, and means for generating a check code word and appending it to each row of said data and first and second parity words for enabling detection of errors in each row.
A method of processing data blocks so that clustered errors in data bits derived from parallel data tracks can be detected, wherein the bits from different locations along the length of the tracks are sequentially derived, comprising arranging the sequentially derived data bits in a storage matrix of rows and columns so that data bits derived at like times from the parallel tracks are aligned in the same columns and sequential data bits derived from the same track are arranged sequentially in different columns in the same row, data bits derived at different times and from the different tracks being respectively arranged in different columns and rows, deriving a first parity bit field, each parity bit of the first parity bit field being formed by combining data bits from a plurality of the rows and a plurality of the columns such that each parity bit is responsive to a data bit in only one of said columns, the number of rows in the first field being equal to the number of rows in the matrix, the parity bits of the first parity field being formed such that every one of said data bits contributes to one and only one parity bit of the first field and the same number of data bits contributes to each parity bit of the first field.
Apparatus for processing data blocks so that clustered errors in data bits derived from parallel data tracks can be detected comprising means for reading the parallel data tracks so the bits from different locations along the length of the tracks are sequentially derived and bits from the same locations of the different tracks are simultaneously derived in parallel, a storage matrix responsive to the bits of the read data tracks, means for arranging the sequentially derived data bits in rows and columns of the storage matrix so that data bits derived at like times from the parallel tracks are aligned in the same columns and sequential data bits derived from the same track are arranged sequentially in different columns in the same row, data bits derived at different times and from the different tracks being respectively arranged in different columns and rows, means responsive to the data bits stored in the matrix for deriving a first parity bit field, said last named means including means for combining data bits from a plurality of the rows and a plurality of the columns such that each parity bit of the first parity bit field is responsive to a data bit in only one of said columns, the number of rows in the first field being equal to the number of rows in the matrix, the parity bits of the first parity field being formed such that every one of said data bits contributes to one and only one parity bit of the first field, and the same number of data bits contributes to each parity bit of the first field.
Dependencies are inferred from the claim text.