Volatile/non-volatile dynamic RAM system
AssigneeNCR Corporation
InventorArmand J. van Velthoven
Life of this patent
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AssigneeNCR Corporation
InventorArmand J. van Velthoven
Estimating the term…
A volatile/non-volatile dynamic RAM cell and system in which the cell comprises a storage capacitor for volatilely storing binary information during normal RAM operation; an alterable-threshold storage capacitor for non-volatilely storing the information in non-volatile fashion during power off conditions; and an energy barrier between the two capacitors. Information can be restored to the volatile capacitor either by CCD charge transfer or by charge-pumped operation. The energy barrier facilitates efficient charge pumped restore of information. In one embodiment, the energy barrier is a high concentration substrate surface region having the same conductivity type as the substrate. Alternatively, the alterable-threshold non-volatile capacitor and the energy barrier are provided by a split-gate capacitor which has an alterable threshold non-volatile section (the non-volatile capacitor) and a non-alterable threshold section (the energy barrier).
A volatile/non-volatile RAM cell having volatile data store, volatile-to-nonvolatile store, and nonvolatile-to-volatile restore capabilities, comprising:
A volatile/non-volatile dynamic field-effect RAM cell having volatile data store, volatile-to-nonvolatile store, and nonvolatile-to-volatile restore capabilities, comprising:
In a volatile/nonvolatile dynamic field-effect RAM cell comprising a semiconductor substrate, a capacitor formed in the substrate for volatilely storing binary charge information, means for selectively supplying charge to the volatile capacitor, and nonvolatile capacitive charge storage means, the improvement comprising structure suitable for effecting charge pumped restore or charge transfer restore to the volatile capacitor of information stored in said nonvolatile charge storage means, characterized by said nonvolatile charge storage means comprising a split gate capacitor having an alterable threshold, nonvolatile section and a non-alterable threshold section interposed between said nonvolatile section and said volatile capacitor, said non-alterable capacitor section providing a substrate surface potential barrier for preventing charge leakage from said volatile capacitor to said non-volatile section during the charge pumped restore operation.
A volatile/non-volatile dynamic random access memory system having volatile store, volatile-to-nonvolatile store, and nonvolatile-to-volatile restore capabilities, comprising:
Dependencies are inferred from the claim text.