Dual-mode transistor turn-off
AssigneeReliance Electric Company
InventorMiroslav Glogolja
Life of this patent
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Abstract
A method and apparatus for applying a reverse bias voltage to the base-emitter junction of a transistor, for turning off the transistor from a normal conduction state, or for connecting a relatively low impedance current path between the base and emitter electrodes for turning off the transistor from a fault conduction state.
Claims19
In a protection circuit for a switching transistor having collector, emitter and base electrodes, said base electrode being responsive to a drive current signal for selectively turning on said transistor, a method for turning off said transistor from conduction of a fault current of substantially higher magnitude than that of the maximum current magnitude determined by the reverse bias safe operating area specification for said transistor, the method comprising the steps of:
- (a) sensing the voltage between the collector and emitter electrodes of said transistor when turned on;
- (b) initiating turn-off of said transistor by removing the drive current to said base electrode while substantially concurrently connecting a relatively low impedance current conduction path between said base and emitter electrodes whenever the level of said sensed voltage equals or exceeds a predetermined level indicative of a fault condition;
- and
- (c) removing the drive current to said base electrode while substantially concurrently connecting a predetermined level of reverse bias voltage to said base electrode, for selectively turning off said transistor from a normal conducting state, as indicated by said sensed voltage being below said predetermined level.
A method of protecting a transistor operated in a saturated emitter collector mode from the effects of a fault, such as a short circuit, occuring in a load connected in an emitter collector path of the transistor, the transistor being operated in the saturated mode in response to drive signal applied to the base electrode of the transistor, comprising:
- removing the drive signal substantially simultaneously with inserting a low impedance shunt between the emitter and base electrodes in response to detection of the fault;
- and applying a reverse bias to the base electrode while removing the low impedance shunt a few microseconds after the drive signal was removed and the shunt was inserted.
Apparatus for protecting a transistor having emitter, base, and collector electrodes from the effects of a fault, such as a short circuit, occurring in a load circuit for the transistor emitter collector path while the transistor is saturated, comprising:
- means connected to be responsive to the fault for driving a fault indicating signal in response to the fault occurring, bias means for selectively driving the base so the transistor is saturated and reverse biasing the base, means for selectively shunting the emitter and base, and a controller responsive to the fault indicating signal for controlling the bias means and the means for shunting, the controller controlling the bias means and the means for shunting so:
- (a) with no fault occuring the transistor is driven to saturation and the shunt is not applied in response to a command for the transistor to conduct,
- (b) the base drive is removed while the shunt is applied in response to the fault occurring while the transistor is commanded to conduct, and
- (c) the reverse bias is applied while the shunt is removed shortly after (b).
Apparatus for controlling operation of a transistor having base, emitter and collector electrodes between cut-off and saturated conditions in response to an input control signal and for protecting the transistor from the effect of a fault, such as a short circuit occurring in a load circuit for the transistor emitter collector path while the transistor is saturated, comprising means connected to be responsive to the fault for deriving a fault indicating signal in response to the fault occurring, bias means for selectively driving the base so the transistor is saturated and reverse biasing the base, means for selectively shunting the emitter base, and a controller responsive to the input command signal and the fault indicating signal for controlling the bias means and the means for shunting, the controller controlling the bias means and the means for shunting so:
- (a) with no fault occurring, the transistor is driven to saturation and the shunt is not applied in response to a first level for the input command signal and the transistor is back biased in response to a second level for the input command signal, and (b) with a fault occurring and the command signal having the first level the base drive is removed while the shunt is applied and (c) the reverse bias is applied while the shunt is removed shortly after (b).
Apparatus for protecting a transistor having emitter, base, and collector electrodes from the effects of a fault, such as a short circuit, occurring in a load circuit for the transistor emitter collector path while the transistor is saturated, comprising:
- means connected to be responsive to the fault for deriving a fault indicating signal in response to the fault occurring, bias means for selectively driving the base so the transistor is saturated, means for selectively shunting the emitter and base, and a controller responsive to the fault indicating signal for controlling the bias means and the means for shunting, the controller controlling the bias means and the means for shunting so:
- (a) with no fault occurring the transistor is driven to saturation and the shunt is not applied in response to a command for the transistor to conduct, and
- (b) the base drive is removed while the shunt is applied in response to the fault occurring while the transistor is commanded to conduct, the bias means including a second transistor having a second emitter collector path in series between a forward bias source and the base, means connected to be responsive to the fault for deriving a fault indicating signal in response to the fault occurring, the means for shunting including a third transistor having a third emitter collector path connected across the base and emitter.
Apparatus for protecting a transistor having emitter, base, and collector electrodes from the effects of a fault, such as a short circuit, occurring in a load circuit for the transistor emitter collector path while the transistor is saturated, comprising:
- means connected to be responsive to the fault for deriving a fault indicating signal in response to the fault occurring, bias means for selectively driving the base so the transistor is saturated, means for selectively shunting the emitter and base, and a controller responsive to the fault indicating signal for controlling the bias means and the means for shunting, the controller controlling the bias means and the means for shunting so:
- (a) with no fault occurring the transistor is driven to saturation and the shunt is not applied in response to a command for the transistor to conduct, and
- (b) the base drive is removed while the shunt is applied in response to the fault occurring while the transistor is commanded to conduct, the bias means including a second transistor having a second emitter collector path in series between a forward bias source and the base.
Dependencies are inferred from the claim text.