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US 4,374,412 AGranted
Circulating page loose system
OwnerMario R. Schaffnerinventor
Life of this patent
Estimating the term…
Abstract
A computer having a programmable network assumes specialized operating configurations corresponding to the functions to be executed at each cycle. For such a computer, the program consists of the description of a Finite State Machine (FSM) that performs the desired process. The language for describing these FSMs consists of digital words formed with a grammar similar to that of spoken languages. This language is equally well suited for expressing the processes that the user has in mind and for actually controlling the computer, thus making the compiler unnecessary. The data related to each FSM are organized in the form of pages that circulates between the registers of the programmable network and a memory that configurates itself as the data, thus making the burden of addressing unnecessary.
Claims12
A programmable network for simultaneously processing sets of variables, comprising:
- a plurality of registers X for holding page variables x.sub.i ;
- a plurality of registers X' for holding auxiliary variables x'.sub.i ;
- a plurality of registers U for holding input data u.sub.i ;
- a plurality of registers W for holding program words w.sub.j,i ;
- decoding means having an input receiving said program words w.sub.j,i and providing a plurality of outputs having control signals thereon;
- control lines connected with said plurality of outputs of said decoding means for carrying control signals therefrom;
- a plurality of operational means capable of performing arithmetic and logical functions, each said operational means having function-control inputs connected to said control lines, an output connected to the input of one of said registers X and X' to supply resulting data thereto, and inputs multiplexed to the outputs of said registers X, X', and U with said multiplexing being controlled by said control signals carried by said control lines;
- and
- timing means, responsive to said control signals carried by said control lines, for establishing a cycle of operation by clocking said resulting data into said registers X and X', with the termination of each said cycle causing a new program word w.sub.j,i to be fed to said input of said decoding means whereby, for each said cycle, new values are simultaneously produced and stored in said registers X and X' as a function of the previous values in said registers X and X', of the values in said registers U, and of the content of program words w.sub.j,i fed to said input of said decoding means.
6 more elements
A data processing apparatus, comprising:
- a programmable network having:
- a plurality of registers X for holding page variables x.sub.i ;
- a plurality of registers X' for holding auxiliary variables x'.sub.i ;
- a plurality of registers U for holding input data u.sub.i ;
- a plurality of registers W.sub.FT for holding programs words w.sub.F,i and w.sub.T,i ;
- first decoding means having an input receiving said program words w.sub.F,i and w.sub.T,i and providing a plurality of outputs having control signals thereof;
- control lines connected with said plurality of outputs of said first decoding means for carrying control signals therefrom;
- a plurality of operational means capable of performing arithmetic and logical functions, each said operational means having function-control inputs connected to said control lines, an output connected to the input of one of said registers X and X' to supply data thereto, and inputs multiplexed to the outputs of said registers X, X', and U with said multiplexing being controlled by said control signals carried by said control lines;
- first timing means, responsive to said control signals carried by said control lines, for establishing a cycle of operation by clocking said data into said registers X and X', with the termination of each said cycle causing a new program word w.sub.F,i and w.sub.T,i to be fed to said input of said first decoding means whereby, for each said cycle, new values are simultaneously produced and stored in said registers X and X' as a function of the previous values in said registers X and X', of the values in said registers U, and of the content of program words w.sub.T,i fed to said input of said first decoding means;
- a register K for holding a key word including a state label;
- means for updating said state label as a function of the then present values in said registers X, X', and U, and of the content of program words w.sub.T,i fed to said input of said first decoding means;
- and
- a plurality of registers W.sub.R for holding program words w.sub.R,i ;
- a packer having:
- pluralities of registers x.sup.P, W.sub.R.sup.P, and a register K.sup.P, all of said registers having one-to-one correspondence with respect to said registers X, W.sub.R, and K of said programmable network;
- means for operatively transfering in parallel the content of said registers X, K, and W.sub.R of said programmable network into said corresponding registers X.sup.P, K.sup.P, and W.sub.R.sup.P of said packer;
- an output buffer with an input;
- a packer bus connected to the ouput of said registers X.sup.P and K.sup.P and to said input of said output buffer;
- second timing means for establishing a packer cycle in which the content of said registers X.sup.P and K.sup.P are transfered one at a time into said packer bus, in conjunction with production of a page-auxiliary-signal, at the beginning of said packer cycle, and a word-auxiliary signal at the transfer of the content from each said register X.sup.P ;
- and
- second decoding means receiving program words w.sub.R,i from said W.sub.R.sup.P registers for skipping the transfer of a specific variable x.sub.i from said register X.sup.P to said packer bus responsive to specific program words w.sub.R,i, altering the order sequence of said transfering of variables x.sub.i to said packer bus responsive to other specific program words w.sub.R,i, and transfering specific variables x.sub.i in said registers X.sup.P into said output buffer responsive to further specific program words w.sub.R,i ;
- a page memory, having:
- a serial storage with a data input connected to said packer bus and an auxiliary signal input receiving said page- and word- auxiliary-signals, and a data and auxiliary-signal outputs;
- and
- means for feeding into said serial storage a page of data, comprising said key word, said page variables x.sub.i and said auxiliary signals, for each cycle of the packer;
- a program memory with an output, addressable in blocks of program words w.sub.I,i, w.sub.F,i, w.sub.T,i, and w.sub.R,i ;
- and an assembler having:
- pluralities of registers X.sup.A, U.sup.A, W.sub.FT.sup.A, W.sub.R.sup.A, and a register K.sup.A, all of said registers having a one-to-one correspondence with respect to said registers X, U, w.sub.FT, W.sub.R, and K, respectively, of said programmable network;
- a plurality of registers W.sub.I.sup.A ;
- an assembler bus connected to said data output of said page memory and to the input of said registers K.sup.A and X.sup.A ;
- a program bus connected to said output of said program memory and to the input of said registers W.sub.FT.sup.A, W.sub.I.sup.A, and W.sub.R.sup.A ;
- an input data bus connected to the input of said registers U.sup.A ;
- third timing means for establishing an assembler cycle, responsive to the page- and word- auxiliary-signals from said auxiliary-signal output of said page memory, for transferring into said registers K.sup.A and X.sup.A from said assembler bus a page of data including a key word and a plurality of page variables x.sub.i ;
- control means for fetching a block of program words w.sub.I,i, w.sub.F,i, w.sub.T,i, and w.sub.R,i into said registers, W.sub.I, W.sub.FT.sup.A, and W.sub.R.sup.A respectively, from said program memory, addressed by said state label in said register K.sup.A,
- control means for fetching input data u.sub.i into said registers U.sup.A, responsive to content in said registers W.sub.I ;
- and
- means for transferring in parallel the page of data held by registers K.sup.A, X.sup.A, U.sup.A, W.sub.FT.sup.A, and W.sub.R.sup.A into the corresponding registers K, X, U, W.sub.FT, and W.sub.R of the programmable network;
- whereby a plurality of said pages, acquiring program blocks, responsive to the present state label, and new data in said assembler, executing operations, exchanging data through the registers X', and updating the state label in said programmable network, and routing data into said output buffer in said packer, carry out a plurality of independent and dependent processes.
35 more elements
A method of multiprocessing by way of circulation of data pages through a series of pipelined stations having an assembler for acquisition of data, a programable network for data transformation, and a packer for routing of data, said method comprising the steps of:
- storing in a program memory pluralities of program blocks, each block including a plurality of codes I for addressing and representing input data, a plurality of codes F for configuring said programable network to implement data transformations, a plurality of codes T for configuring said programable network to implement transition functions selecting a state label, and a plurality of codes R for routing data to specified locations;
- introducing into said circulation a data page including a said state label;
- processing each said data page introduced into said circulation including acquiring by said page in said assembler one said program block, responsive to said state label in the said circulating data page, and new input data, responsive to said I codes in said program block;
- executing a succession of data transformations on said page by means of operational configurations in said programable network, responsive to the succession of said codes F in said program block;
- substituting said state label in the page by means of operational configurations in said programable network, responsive to said codes T in said program block;
- and routing data from said page in said packer to locations specified by said codes R of said program block, wherein one said location is said circulation itself, thus creating a new page in said circulation;
- and
- terminating processing of each said data page when the new state label is the one selected for the page disappearing.
5 more elements
Dependencies are inferred from the claim text.