Monolithic sequential processor for four-quadrant multiplier arrays
AssigneeWestinghouse Electric Corp.
InventorDonald R. Lampe
Life of this patent
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AssigneeWestinghouse Electric Corp.
InventorDonald R. Lampe
Estimating the term…
An integrated circuit sequential processor includes a charge-coupled device having input and output diffusion regions in a semiconductor substrate and a plurality of electrodes therebetween on an insulating layer formed on the semiconductor substrate. Switching means are coupled between an analog signal input and the electrodes for selectively applying a sequence of voltage potentials to the electrodes in order to meter onto the capacitor formed at the output diffusion region, charge corresponding to the sequence of voltage potentials. A circuit including a potential converting means is coupled to the output diffusion region for storing a potential indicative of the charge on the capacitor formed at the output diffusion region. The circuit also includes an output capacitor for providing an output potential indicative of the potential on the storing capacitor in response to a signal.
A charge-coupled circuit for metering electrical charge comprising:
A charge-coupled circuit for metering electrical charge, said charge-coupled circuit comprising:
A charge-coupled circuit for metering electrical charge comprising:
A charge-coupled circuit for metering electrical charge comprising:
A circuit comprising:
A method using a charge-coupled device (CCD) for obtaining the sum of products of first, second, third and fourth input signals, said CCD having thereon input well-forming means for forming at least one input potential well in said CCD, said method comprising the steps of:
Dependencies are inferred from the claim text.