A digital computer system for selecting and linking multiple separately stored data processing procedures consisting of assembly level commands and for selecting a variable data area from a plurality of variable data areas, comprising:
- a first memory for storing N absolute address trios, where N is any integer greater than one, each of said absolute address trios being selectable by a respective module address with each of said absolute address trios consisting of a link page table address, a code base address and a static data base address;
- a second memory for storing N code segments, each of said code segments being selectable by a respective one of said code base addresses and consisting of a plurality of said procedures, with each procedure beginning at an offset address relative to the code base address of the corresponding code segment;
- a third memory for storing N static data segments, each of said static data segments being selectable by a respective one of said static data base addresses and consisting of a plurality of said variable data areas with each variable data area having an absolute address;
- a fourth memory for storing N link page tables, each of said link page tables being selectable by a respective one of said link page table addresses and containing a number of first and second relative address pairs, each of the relative address pairs being selectable by a respective predetermined displacement address is an assembly level command, with the first relative address being a said module address thereby indicating one of said N code base addresses in the first memory and the second relative address indicating said offset address from the indicated code base address to a predetermined one of said procedures and/or containing a number of said absolute variable data area addresses, each of said absolute variable data area addresses being selectable by a respective given displacement address in an assembly level command;
- a module register for accessing the first memory to select an absolute address trio from the first memory in response to said module address;
- a link page table register for accessing the fourth memory to select a relative address pair from the fourth memory in response to the link page table address in the selected absolute address trio and in response to a said predetermined displacement address, and to select an absolute variable data area address from the fourth memory in response to the link page table address in the selected absolute address trio and in response to a said given displacement address;
- a program counter for accessing the second memory to select a procedure from the second memory in response to the code base address and the offset address indicated by the selected relative address pair;
- a data address register for accessing the third memory to select a variable data area from the third memory either in response to the static data base address in the selected absolute address trio and a fixed displacement address that is included in an assembly level command, or in response to the selected absolute variable data area address;
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- a hardware unit adapted to execute assembly level commands and coupled to the memories, the registers and the program counter for executing the procedures selected by the program counter from the second memory;
- for providing the module address in the relative address pair selected by the link page table register from the fourth memory to the module register for accessing the first memory to select a said absolute address trio;
- for providing the code base address selected by the module register from the first memory and the offset address selected by the link page table register from the fourth memory to the program counter for accessing the second memory to select a said data processing procedure;
- for providing the static data base address selected by the module register from the first memory and the displacement address included in an assembly level command of the executed procedure to the data address register for accessing the third memory to select a said variable data area;
- for providing the absolute variable data address selected by the link page table register from the fourth memory to the data address register for accessing the third memory to select a said variable data area;
- for providing the link page table address selected by the module register from the first memory and the predetermined displacement address included in an assembly level command of the executed procedure to the link page table register for accessing the fourth memory to select a said relative address pair;
- and for providing the link page table address selected by the module register from the first memory and the given displacement address included an assembly level command of the executed procedure to the link page table register for accessing the fourth memory to select a said absolute variable data area address.