p-Si/n-CdS Heterojunction photovoltaic cells

#This invention relates to photovoltaic cells of new design. One of the most promising method of constructing solar cells for terrestrial use consists of placing two semiconductors of different chemical structure into intimate contact. It is generally considered that in order to demonstrate good electrical and photovoltaic performance, the two materials constituting such a heterojunction must generally possess a crystalline structure having lattice parameters which are very close to each other in order to minimise the defect density at the interface. Devices have been constructed within this type of optical arrangement, such as n-CdS/p-InP (S. Wagner, J. L. Shay, K. T. Bachmann, E. Buchler, Appl.Phys. Lett. 26, 229 (1975)), and n-CdS/p-CuInSe.sub.2 (S. Wagner, J. L. Shay, P. Migliorato and H. M. Kasper, Appl. Phys. Lett. 25, 434 (1974)), in which the lattice parameters of the materials used differ from each other by less than 1%, and which show solar energy conversion efficiencies equal to or greater than 12% (under AM1 or AM2 illumination conditions). In contrast, in heterostructures constructed of semiconductor materials having lattice parameters which differ considerably from each other, conversion efficiencies of less than 9-10% are generally obtained.

#In particular, for the heterostructure constituted by n-CdS on p-Si, in which the difference between the lattice parameters is 7%, the best conversion efficiencies reported lie between 5.5% (H. Okimura and R. Kondo, Jap. J. Appl. Phys. 9, 274 (1970)) and 7% (F. M. Livingstone, W. M. Tsang, A. J. Barlow, R. M. De La Rue and W. Duncan, J. Phys. D, 10, 1959 (1977)).

#Moreover, in both these cases, the results relate to devices of extremely small area, of less than or equal to 1 mm.sup.2. It has now been surprisingly found, and constitutes the subject matter of the present invention, that it is possible to provide n-CdS/p-Si heterojunctions having high conversion efficiencies (.gtoreq.10%) on large area devices (greater than 1.5 cm.sup.2) in spite of the considerable difference between the lattice constants of the two materials, which exceeds 5%. In such cells, the n-type semiconductor material is constituted by CdS having a conductivity equal to or greater than 10 .OMEGA..sup.-1 cm.sup.-1, and containing indium in a percentage higher than 1%.

#The invention is explained with reference to the accompanying drawings wherein:

#FIG. 1 is a diagrammatic view of a water-cooled bell for growth of CdS layer;

#FIG. 2A is a plan view of a shutter and adjacent equipment at the top of the bell of FIG. 1;

#The electrical and photovoltaic characteristics of the device were measured in experimental prototypes constructed in the manner described hereinafter. Junctions having an area of 2 cm.sup.2, when in the dark and at ambient temperature have electrical characteristics of rectifying type, with a diode quality factor of between 1.1 and 1.4, a direct resistance of between 0.5 and 5.OMEGA. and an inverse resistance of between 10.sup.5 and 10.sup.6 .OMEGA..

#FIG. 7 shows a typical current-voltage characteristic curve in the absence of illumination and at a temperature of 300.degree. K., for a heterojunction of 2 cm.sup.2 constituted by p-doped monocrystalline silicon having a thickness of 300 .mu.m and a resistivity of 1.times.10.sup.-2 .OMEGA.cm. When directly biased by a current greater than 10.sup.-4 A, an exponential characteristic curve is obtained with a quality factor of 1.35 and a series resistance of 1.4.OMEGA. (31). Under reverse bias (32) there is a saturation current of about 4.times.10.sup.-6 A and an inverse resistance of about 1.7.times.10.sup.5 .OMEGA..

#The capacity of the devices constructed follows the usual relationship for step junctions, according to which the inverse of the square of the capacity is proportional to the applied voltage (under reverse bias), and the measured values correspond to a concentration of impurities, in the p region, of 10.sup.15 to 10.sup.16 cm.sup.-3, which is in excellent agreement with the resistivity of the silicon used.