Device for switching digital data

A device for switching digital data emitted by "n" input circuits to an output circuit, comprising on the one hand "n" live memories designated as standby memories for storing respectively the digital data emitted by said input circuits at write addresses provided respectively by said input circuits, an output bus line connected to the outputs of said standby memories and to said output circuit, and on the other hand a standby-memory read management circuit which in turn comprises:

• "n" live memories designated as management memories for storing respectively the write addresses of said standby memories, said management memories being provided with outputs connected respectively to read address inputs of said standby memories;
• a read/write sequential addressing circuit which is common to said management memories, said circuit being write-incremented at the time of each writing by one of said input circuits into one of said standby memories and being read-incremented at the time of each reading of one of said standby memories by said output circuit;
• a circuit for establishing reading priority of said standby memories and for read-blocking of said sequential addressing circuit in the event of simultaneous emission by a number of said input circuits;
• a circuit for enabling one out of "n" of said management memories, the enabling operation being performed at the time of writing of said management memories by the particular input circuit which is associated with the enabled management memory and at the time of reading of said management memories by said circuit for establishing priority and blocking.