Co-planar barrier-type charge coupled device with enhanced storage capacity and decreased leakage current
AssigneeTexas Instruments Incorporated
InventorsPallab K. Chatterjee, Aloysious F. Tasch, Jr.
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AssigneeTexas Instruments Incorporated
InventorsPallab K. Chatterjee, Aloysious F. Tasch, Jr.
Estimating the term…
A charge coupled device is disclosed which includes a plurality of stages having increased charge storage capacity and decreased leakage current. Each stage is comprised of a semiconductor substrate of a first-type conductivity having a first surface. An insulating layer of uniform thickness lies on the first surface. A charge transfer channel extends through each stage. Phase electrodes lie on the insulating layer transversely to the channel. The semiconductor substrate under each phase electrode is divided into a barrier region and an adjacent well region bounded by the channel. A shallow dopant layer of the first-type conductivity lies in each of the barrier regions relatively near to the first surface. A buried channel dopant layer of a second-type conductivity lies in the well regions and the barrier regions under and relatively near to the shallow first-type conductivity dopant layer. Additionally, an enhanced first-type conductivity dopant layer lies in the well regions and the barrier regions under and relatively near to the buried channel dopant layer of second-type conductivity.
A charge coupled device comprising:
A charge coupled device comprising:
Dependencies are inferred from the claim text.