US 4,365,210 AGranted

Data and clock recovery system having a phase-locked-loop and which controls dynamic loop response of a data stream of unknown data format

AssigneeMotorola, Inc.

InventorsWayne D. Harrington, Stanley E. Groves

Life of this patent

Estimating the term…

Loading patent…

Abstract

A data and clock recovery system for capturing and processing serial data of a type wherein data bits of an unknown format are interleaved with clock bits utilizes a phase lock loop capable of being operated in a capture mode or a tracking mode. The data stream is compared with an internally generated reference signal, and error pulses having widths proportional to the phase error are generated. In the capture mode, these error pulses are differentially processed to produce a control voltage which varies the frequency of a VCO which in turn alters the reference frequency. In the tracking mode, phase error pulses of fixed widths are processed only if the data bits occur in fixed windows. Differential amplifying means provide adjustable gain control of the error pulses. Means are provided for digitally controlling the loop's dynamic response when switching between the capture and tracking modes.

Claims16

Dependent claims

A phase-lock-loop circuit for generating a reference signal which is in phase with an input signal, comprising:

comparing means for receiving said reference signal and said input signal and for generating at an output an error signal indicative of the phase difference between said reference signal and said input signal;
first means having an input coupled to the error signal from said comparing means for generating said reference signal, said first means being responsive to said error signal for bringing said reference signal into phase with said input signal;
second means coupled between the output of said comparing means and the input of said first means for inhibiting said error signal if said input signal occurs either earlier or later than a predetermined interval of time;
and
third means coupled to said comparing means and to said second means for generating a window during which receipt of an input signal which is out of phase with said reference signal will result in the generation of said error signal, the duration of said window corresponding to said predetermined interval of time wherein said input signal is one of a plurality of input pulses, said reference signal is one of a plurality of reference pulses, said window corresponds to a first state of a window signal capable of alternately assuming first and second states and wherein said error signal corresponds to a plurality of error pulses one of which is generated each time out-of-phase input and reference pulses are received during said first state.

2 more elements

A data recovery system for capturing and tracking a serial data stream including a synchronization field and clock bits interleaved with data bits, comprising:

phase lock loop means for synchronizing a reference signal with said synchronization field during a capture mode of operation and for tracking said clock and data bits during a tracking mode of operation;
first means coupled to said phase lock loop means, for decreasing the dynamic response time of said loop means during said capture mode to achieve rapid phase and frequency lock to said synchronization field and for increasing the dynamic response time of said loop means during said tracking mode, wherein said phase lock loop means comprises:
a comparator for receiving bits of said data stream and said reference signal and for generating error pulses of a first type indicative of the phase difference between one of said bits and said reference signal;
second means coupled to said comparator and responsive to the error pulses of said first type for generating error pulses of a second type if said one of said bits occurs within a predetermined time interval;
differential amplifying means;
multiplexing means having inputs coupled to said comparator and to said second means and having outputs coupled to said differential amplifying means for selecting error pulses of said first type in said capture mode and for selecting error pulses of said second type in said tracking mode;
filter means coupled to said differential amplifying means for extracting a dc control voltage from said error pulses;
and
third means coupled to said filter means for generating said reference signal, said third means being responsive to said dc control voltage for bringing said reference signal into phase with said data stream.

6 more elements

Dependencies are inferred from the claim text.