Photoelectric write-only sequence controller
OwnerYoshikazu Kuzeinventor
Life of this patent
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Abstract
Sequence controller for writing data into an EPROM and a film on which the data to be written is recorded. Film (1) is provided by printing clock marks (2) and R/W lines (3) on a transparent body and pasting opaque tapes onto data lines (4) according to a time chart to be written into the EPROM. Accordingly, the resultant data records are visible and it is easy to renew the data. In the sequence controller, a synchronous clock pulse generator and gate devices operate so that the data are photoelectrically read out to be recorded in a RAM (59) in a short period of time as the film is passed along a path defined by a sheet reader (20) after the EPROM (30) has been mounted. Thereafter, the data is written into the EPROM. Thus, the sequence controller can be of a small size and easy to operate.
Claims8
A photo-electric write-only sequence controller whereby a transparent program sheet bearing information is inserted into, passed through and extracted from said controller, which comprises:
- a sheet reading device defining a path along which said program sheet passes which includes a plurality of light-emitting elements disposed in the lateral direction at the entrance of said path and a plurality of light-receiving elements, each of which is corresponding to each of said light-emitting elements and arranged to generate write clock pulses data output and R/W signals when light from the corresponding light-emitting elements is interrupted by information on said program sheet;
- a RAM for memorizing said data in synchronism with said write clock pulses;
- an EPROM detachably connected with terminals for said RAM;
- means for generating read clock pulses;
- a first binary counter for counting said write clock pulses and for addressing said RAM and EPROM;
- a second binary counter for counting said read clock pulses and for generating program pulses for writing data in said EPROM;
- a first gate means responsive to a first mode of said R/W signal to render said RAM in the write-in state and responsive to the second mode of said R/W signal to change said RAM to a read-out state;
- a second gate means responsive to a first mode of said R/W signal effective to set said first binary counter and to reset said second binary counter and to render said RAM in an enable state;
- a third gate means for generating a signal for stopping the reading operation when the count of said binary counter reaches a predetermined number;
- whereby data in said program sheet is written in said RAM as said program sheet is passed through said sheet-reading device and data stored in said RAM is automatically written in said EPROM after the program sheet has been passed through and extracted from said sheet-reading device.
Dependencies are inferred from the claim text.