US 4,363,104 A · Imaging system having multiple image copying and hierarchical busing

Abstract

A very high speed video imaging system wherein the video image from each video frame of M.sub.1 columns and M.sub.2 rows of video pixels is multiplexed serially by row, each image pixel corresponding to an address in said video frame; image enhancement processing is performed in real time, using r programmable processors operating on successive kernels comprising L.sub.1 rows and L.sub.2 columns of the image pixels. Real time image processing is made possible by multiple image copying means which furnishes multiple copies of the image pixels to the r processors, wherein each one of the processors receives a copy of only those image pixels having an address lying within an assigned range, which limits the amount of data handled by each processor for each video frame. The use of multiple image copies permits each processor to process pixels at an average rate which is reduced from the video data rate by a factor proportional to 1/r, thus permitting programmable processing to occur in real time despite the relatively slow speed of the processors and the high video data rate. The invention thus eliminates time sharing or arbitration among the plurality of processors.

Claims16

Dependent claims

An imaging system wherein video data from each video frame of video data words is multiplexed serially by a row, including means for enhancing said video data by operating on successive kernels of said data words, comprising:

a plurality of main processors and memories individually associated with said processors, each of said processors corresponding to an individually assigned block of video data words in said frame;
a plurality of bus control means, individually associated with said processors, each one of said bus control means for selecting those data words from said video data words which lie within the corresponding assigned data word block;
data bus means for simultaneously distributing each of said data words to said k bus control means;
and
a plurality of internal data bus means individually associated with said plurality of bus control means, each of said internal data bus means for carrying the selected ones of said data words from the corresponding bus control means to the corresponding one of said memories and for permitting the corresponding one of said processors to access data words in said corresponding memory, wherein each processor is programmed with selected operator means for generating an enhanced value from each kernel of data words stored in the corresponding memory.

2 more elements

A video imager having the capability to perform programmable image enhancement in real time, comprising:

a source of video data words representing an array of columns and rows of data words, said source being organized serially by rows;
a plurality of r main processors, each programmed to operate on a kernel comprising a specific number of said columns and rows of said data words, each kernel being disposed symmetrically with respect to an operand one of said data words and each of said processors corresponding to an individually assigned block of data words in said video source;
a plurality of memories, each utilized by one of said processors;
a plurality of bus control means each individually associated with one of said processors, each one of said bus control means for selecting those data words from said video source which lie within the data word block corresponding to one of said processors;
data bus means for simultaneously distributing each of said data words to said bus control means;
and
a plurality of internal data bus means, each one of said internal data bus means for carrying the selected ones of said data words from the corresponding bus control means to the corresponding one of said memories and for permitting the corresponding one of said processors to access data words in said one memory, wherein each processor is programmed with selected operating means for generating an enhanced value from each kernel stored in the corresponding memory.

4 more elements

Dependencies are inferred from the claim text.

Imaging system having multiple image copying and hierarchical busing

Life of this patent

Imaging system having multiple image copying and hierarchical busing

Life of this patent

Abstract

Claims16