FM Receiver
AssigneePioneer Electronic Corporation
InventorKohji Ishida
Life of this patent
Estimating the term…
Abstract
An FM receiver in which the length of the signal path is significantly shortened and in which separation between right and left channels is implemented by adjusting a DC bias voltage. A pulse train signal having a frequency dependent upon the instantaneous frequency of the received FM signal is generated. Subcarrier signals in and out of phase with a pilot signal component in the pulse train signal are produced and a variable DC component is added thereto. The subcarrier signals including the DC component are multiplied to obtain pulse train signals. The pulse train signals are integrated to yield right and left stereophonic channel signals.
Claims9
An FM receiver comprising:
- pulse modulation signal generating means for generating a pulse train signal having a parameter corresponding to an instantaneous frequency of a received FM signal;
- subcarrier signal generating means for selectively detecting a pilot signal component included in one of said received FM signal and said pulse train signal to generate a first subcarrier signal in phase with said pilot signal and a second subcarrier signal opposite in phase to said pilot signal, said first and second subcarrier signals including a predetermined DC component;
- multiplication means for separately multiplying first and second subcarrier signals including said predetermined DC component by said pulse train signal to provide multiplication signals;
- and
- means for providing output stereophonic signals included in said received FM signal from said multiplication signals.
An FM receiver comprising:
- a front end section;
- an intermediate frequency amplifier;
- a local oscillator;
- a mixer having inputs coupled to an output of said intermediate frequency amplifier and said local oscillator;
- a first low-pass filter having an input coupled to an output of said mixer;
- a limiter having an input coupled to an output of said first low-pass filter;
- a monostable multivibrator having an input coupled to an output of said limiter;
- a subcarrier signal generator having an input coupled to an output of said monostable multivibrator;
- a phase inverter having an input coupled to an output of said subcarrier generator;
- first and second analog signal adder circuits, said first analog signal adder circuit having a first input coupled to an output of said subcarrier generator and said second analog signal adder having a first input coupled to an output of said phase inverter;
- an adjustable DC bias supply having an output coupled to second inputs of each of said first and second analog signal adders;
- first and second analog gates having a control input coupled to said output of said monostable multivibrator and said first analog gate having a signal input coupled to an output of said analog signal adder circuit and said second analog gate having a signal input coupled to an output of said second analog signal adder circuit;
- and
- first and second integrator circuits having inputs coupled, respectively, to outputs of said first and second analog gates, separated stereophonic signals being produced on the outputs of said first and second integrator circuits.
Dependencies are inferred from the claim text.