US 4,360,913 A · Multiplexing I/O module

Abstract

A preferred embodiment of an input module is connected through six address terminals and four data terminals to six banks of contacts. A single bank address is coupled to two latches in the module and then to two banks of contacts. A nibble of data is coupled from each of two banks of contacts to each of two corresponding data latches on the module. The sequential addressing of a low nibble bank and a high nibble bank and the latching of data therefrom is controlled by sequencing circuitry which is enabled each time a bank address is written to the module. In a second embodiment coded information is output through the six address terminals and decoded by two external decoders to multiplex 256 inputs to the processor. Such modules are particularly useful in multiplexing a large number of inputs to the processor of a programmable controller.

Claims11

Dependent claims

An I/O module adapted for connection between an I/O bus and a plurality of I/O devices and responsive to control signals from a main processor for coupling address signals from the I/O bus to first and second I/O devices in succession to multiplex or demultiplex two respective groups of I/O data bit signals that are coupled between the I/O devices and the I/O module and to couple these I/O data bit signals through the I/O bus during a single word transmission time in a multibit word of I/O data signals formed of the two groups of I/O data bit signals, the I/O module comprising:

first means responsive to a first control signal from the main processor for coupling the I/O address signals received from the main processor through the I/O bus to first and second I/O devices in succession;
second means for temporarily storing I/O data bit signals on the I/O module;
third means responsive to the first control signal from the main processor for coupling the first group of I/O data bit signals between the first I/O device and the second means, and for then coupling a second group of I/O data bit signals between the second I/O device and the second means;
and
fourth means connected to the third means and responsive to a second control signal from the main processor to couple the multibit word of I/O data signals between the second means and the I/O bus during the single word transmission time, wherein the multibit word of I/O data signals is formed of the first group of I/O data bit signals and the second group of I/O data bit signals.

2 more elements

In a programmable controller having a main processor, a connector with I/O terminals for connecting a plurality of input devices to the controller, and an input module for coupling signals from the connector to the main processor through an I/O bus in response to read and write signals from the main processor, the improvement of a multiplexing input module which comprises:

first latch means coupled to the I/O bus for receiving addresses for groups of inputs, wherein each group of inputs forms an I/O bank;
first gate means for generating a pair of addresses through a set of address terminals on the connector, where each terminal is adapted to be connected to a respective I/O bank;
second latch means for coupling data from one I/O bank to one portion of the I/O bus through a set of data terminals on the connector;
third latch means for coupling data from a second I/O bank to another portion of the I/O bus, which is parallel to its first portion, through the set of data terminals on the connector;
enabling means responsive to a write signal from the main processor for generating enabling signals to selected portions of the first gate means to couple the pair of addresses to two respective I/O banks in sequence;
means for generating clock signals to the second and third latch means to couple a first bit group of input data from the first I/O bank to the second latch means, and to thereafter couple a second bit group of input data from the second I/O bank to the third latch means;
and
second gate means connected to the second and third latch means and responsive to a read signal from the main processor to couple a byte of data from the second and third latch means to the I/O bus.

5 more elements

Dependencies are inferred from the claim text.

Multiplexing I/O module

Life of this patent

Multiplexing I/O module

Life of this patent

Abstract

Claims11