Multi-line scan mark verification circuit
AssigneeWestinghouse Electric Corp.
InventorMichal M. Feilchenfeld
Life of this patent
Estimating the term…
Abstract
In a document scanning scheme where data is preceded on the document by a preprinted document scan mark, circuitry is employed to utilize multiple line scans of the scan mark by a line scan camera to verify the presence of a scan mark and avoid erroneous response to random marks on the document.
Claims3
In an optical scanning system including a line scan camera for scanning a document on a line-by-line basis and developing both a video valid output signal indicative of valid video information being viewed by the camera and an electrical output signal indicative of the document information from each scan line, said document including areas for accommodating data information and one or more pre-printed scan marks for establishing the location of the document and alerting the system information processing circuitry to the fact that data information areas of the document are about to be scanned, said system including memory means for generating scan mark location information identifying the scan mark location for a predetermined document format, the improvement for verifying the presence of a scan mark via two or more scan lines, said improvement comprising:
- first circuit means responsive to said scan mark location information from said memory means for acknowledging a first scan line identification of a scan mark and developing an output signal indicative thereof,
- second circuit means responsive to said scan mark location information from said memory means for acknowledging a scan line identification of a scan mark and developing an output signal indicative thereof, and
- third circuit means responsive to the output signal of said first circuit means for inhibiting the operation of said second circuit means for a predetermined time duration following identification of said first scan line of the scan mark, the output signal generated by said second means following said predetermined time duration being a system scan mark verification signal for alerting said system information processing circuitry to the fact that a valid scan mark has been detected.
Dependencies are inferred from the claim text.