Surface-acoustic-wave device
AssigneeClarion Co., Ltd.
InventorsShoichi Minagawa, Takamasa Sakai, Takeshi Okamoto, Morihiro Niimi
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AssigneeClarion Co., Ltd.
InventorsShoichi Minagawa, Takamasa Sakai, Takeshi Okamoto, Morihiro Niimi
Estimating the term…
A surface-acoustic-wave device has a laminate formed of a semiconductor and a piezoelectric layer and a depletion layer control means locally provided at an interface portion of the semiconductor and said piezoelectric layer, wherein a parametric interaction is caused at a region other than an area where the depletion layer control means is provided and a depletion layer capacitance is controlled by applying a DC bias voltage and a pumping voltage to the depletion layer control means.
A surface-acoustic-wave device which comprises:
A surface-acoustic-wave device which comprises:
A surface-acoustic-wave device which comprises:
Dependencies are inferred from the claim text.
Amplifiers using amplifying element consisting of two mechanically- or acoustically-coupled transducers
Amplifiers
Term ended 14 Aug 2000 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
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1. Field of the Invention
This invention relates to a surface-acoustic-wave device which can function as a surface-acoustic-wave amplifier, and more particularly to a surface-acoustic-wave device having a depletion layer control means formed of a p-n junction at an interface portion between a semiconductor and a piezoelectric layer which is capable of preventing application of a DC voltage to the piezoelectric layer so as to minimize voltage hysteresis and assure stable characteristics.
2. Description of Prior Art
FIG. 1 is a side elevational view of a conventional surface-acoustic-wave device;
FIG. 2 is a side elevational view of one form of a surface-acoustic-wave device according to the present invention;
FIG. 3 is a sectional view of a main portion of the device as illustrated in FIG. 2;
The invention will be described in detail referring to the drawings.
In FIG. 2, S is a semiconductor made, for example, of silicon (Si) and A is a piezoelectric layer made of zinc oxide. The semiconductor S and the piezoelectric layer A form a laminate.
The laminate is prepared, for example, by employing the semiconductor S as a substrate, forming a depletion layer control means as will be described in detail later on the substrate and depositing a piezoelectric material such as zinc oxide (ZnO) on the substrate in the form of a film by evaporation, sputtering, etc.