EFL Toggle flip-flop
AssigneeMotorola, Inc.
InventorsRoy H. Espe, W. Eric Main
Life of this patent
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Abstract
A toggle flip-flop of the type which is controlled by a clock signal capable of assuming high and low states includes a master circuit portion and a slave circuit portion. The master circuit portion includes a first output stage which is latched when the clock signal is high while the slave circuit portion has an output stage which is latched when the clock signal is low. A driving voltage signal is produced in the slave circuit portion for driving the second output stage. Means are provided for inverting the driving voltage signal and for using the inverted version to drive the first output stage.
Claims8
A toggle flip-flop of the type controlled by a clock signal capable of assuming first and second states, said flip-flop comprising:
- a master circuit portion including:
- first output transistor means having a collector terminal coupled to a source of supply voltage and having first and second emitter terminals and a base terminal;
- and
- first means coupled to said first emitter terminal of said first output transistor means for latching said first output transistor means when said clock signal is in said first state;
- a slave circuit portion having an input coupled to said second emitter terminal of said first output transistor means for producing a Q output of said flip-flop, said slave circuit portion comprising:
- second output transistor means having a collector terminal coupled to said source of supply voltage, a first emitter terminal for producing said Q output and having a second emitter terminal and a base terminal;
- second means coupled to the base terminal of said second output transistor means for producing a driving voltage on said base terminal;
- and
- third means coupled to said second emitter terminal of said second output transistor means for latching said second output transistor means when said clock signal is in said second state;
- and
- fourth means coupled to said second means and to the base terminal of said first output transistor means for inverting said driving voltage and applying an inverted driving voltage to the base terminal of said first output transistor means.
Dependencies are inferred from the claim text.